354 Commits

Author	SHA1	Message	Date
Joachim Strömbergson	a48dc7cbbb	Add reg writable from FW, readable from app for blake2s entry ... Signed-off-by: Joachim Strömbergson <joachim@assured.se>	2022-12-08 16:16:15 +01:00
Michael Cardell Widerkrantz	3220d1c119	testfw: Remove test_ prefix on UART functions	2022-12-02 16:12:25 +01:00
Michael Cardell Widerkrantz	65bc96a725	fw: Prefix all HTIF console I/O functions with htif_	2022-12-02 15:09:10 +01:00
Daniel Lublin	49d4735f17	Use TKey name ... Signed-off-by: Daniel Lublin <daniel@lublin.se>	2022-12-02 08:03:06 +01:00
Daniel Lublin	f87e12d1bb	Build with zmmul extension (require clang 15) ... Signed-off-by: Daniel Lublin <daniel@lublin.se>	2022-11-29 13:03:06 +01:00
Daniel Lublin	367fbec035	tpt: print whole output file paths when verbose ... Signed-off-by: Daniel Lublin <daniel@lublin.se>	2022-11-29 12:50:26 +01:00
Daniel Lublin	0541be76f3	tpt: make it really ask for items that are not passed in args ... Signed-off-by: Daniel Lublin <daniel@lublin.se>	2022-11-29 12:39:24 +01:00
Daniel Lublin	3c09960918	Ignore virtualenv dir down where we use it; unignore disused toolchain dirs ... Signed-off-by: Daniel Lublin <daniel@lublin.se>	2022-11-29 08:10:05 +01:00
Michael Cardell Widerkrantz	a0974a2c0b	fw: Make FW_CMD_NAME_VERSION return names as ASCII arrays ... Signed-off-by: Michael Cardell Widerkrantz <mc@tillitis.se>	2022-11-28 16:17:19 +01:00
Daniel Lublin	a2bc95f49a	Flash red when ending in unknown stat ... Signed-off-by: Daniel Lublin <daniel@lublin.se>	2022-11-28 16:17:19 +01:00
Daniel Lublin	687ee4f8b1	Let LED be steady white when loading app	2022-11-28 16:17:19 +01:00
Michael Cardell Widerkrantz	60b2dcfbb9	fw: Don't allow an app size of 0	2022-11-28 16:17:19 +01:00
Michael Cardell Widerkrantz	c80dc53027	fw: Introduce an explicit state machine - changes protocol! ... We introduce an explicit state machine (see README). With the new states we: - combine setting size and USS to a single command. - start the device app immediatiely when having receceived the last data chunk and returning the digest. - Loop forever and wait for the stick to be removed if we end up in unknown state. Signed-off-by: Michael Cardell Widerkrantz <mc@tillitis.se>	2022-11-28 16:17:19 +01:00
Joachim Strömbergson	2fa1ffb8e7	Disable HW support in CPU for DIV ... Signed-off-by: Joachim Strömbergson <joachim@assured.se>	2022-11-28 16:15:01 +01:00
Daniel Lublin	3435941eab	Remove version suffixes, no longer needed on ubuntu 22.10 (clang 15) ... Signed-off-by: Daniel Lublin <daniel@lublin.se>	2022-11-23 09:47:48 +01:00
Joachim Strömbergson	a15a94fe8e	Move readme:s for boards and firmware to doc subdir ... Signed-off-by: Joachim Strömbergson <joachim@assured.se>	2022-11-21 16:27:30 +01:00
Daniel Lublin	acb9c37ee7	Add fw cmd to get UDI	2022-11-21 15:45:27 +01:00
Daniel Lublin	a2ffb6d007	Correct reference	2022-11-15 15:19:45 +01:00
Joachim Strömbergson	1a49304224	Merge branch 'main' of github.com:tillitis/tillitis-key1	2022-11-09 15:06:07 +01:00
Joachim Strömbergson	159b20fa4e	Zero extend the address to match SB_RAM4K ports	2022-11-09 15:05:03 +01:00
Daniel Lublin	a14662c622	Change to max 100 KB app with 28 KB stack	2022-11-02 15:52:29 +01:00
Daniel Lublin	fdda69745e	Add wrapper script that runs reset.py using virtualenv	2022-11-02 15:19:31 +01:00
Daniel Lublin	7af0fc6777	Make hid_test fail less confusingly when programming device is not connected ... Add requirements.txt	2022-11-02 15:19:30 +01:00
Matthew Mets	48f32949bc	Add software reset example for the mta1 programmer	2022-11-02 15:16:24 +01:00
Joachim Strömbergson	517fafff57	Merge branch 'bigger_rx_fifo'	2022-11-02 14:22:46 +01:00
Daniel Lublin	8755a65a38	Format code	2022-10-31 10:07:23 +01:00
Joachim Strömbergson	8061491f6e	Cleanup, and use fifo_empty to indicate data available	2022-10-28 13:12:47 +02:00
Joachim Strömbergson	24d8680772	Improve detection of empty and full FIFO	2022-10-28 13:09:21 +02:00
Joachim Strömbergson	0eacbca2f9	Increase size of RX-FIFO to 512 bytes	2022-10-28 12:48:13 +02:00
Daniel Lublin	85ef93cd3c	Clarify switch_app reads and writes; add read test to testfw	2022-10-26 11:38:58 +02:00
Daniel Lublin	4b4f014d38	Rename to TK1	2022-10-26 09:20:02 +02:00
Daniel Lublin	db8f9cf881	Document SRAM==SPRAM; fix whitespace	2022-10-24 11:58:54 +02:00
Michael Cardell Widerkrantz	490571b6c0	Clear all RAM during start ... Since SRAM has some data remanence even without power it seems good hygien to clear all RAM when starting the device so as not to leak potential sensitive data between device apps.	2022-10-24 11:52:52 +02:00
Daniel Lublin	1661ac20d4	tpt: correct and clarify ranges	2022-10-24 10:05:05 +02:00
Daniel Lublin	ecc2923387	Explain how we attain 18 MHz	2022-10-21 14:33:03 +02:00
Daniel Lublin	675fa1087f	Raise bps to 62500	2022-10-21 14:10:41 +02:00
Michael Cardell Widerkrantz	b8f1d4a083	Add make target secret, update quickstart	2022-10-20 17:02:56 +02:00
Daniel Lublin	65f2272a45	Add TRNG to testfw, document	2022-10-20 12:05:19 +02:00
Michael Cardell Widerkrantz	c52f7d52cd	testfw: Add timer tests	2022-10-20 11:34:01 +02:00
Joachim Strömbergson	19b75e71fe	Fix bit counter and simplify emtropy extraction	2022-10-19 13:10:26 +02:00
Joachim Strömbergson	20647fc486	Merge branch 'main' of github.com:tillitis/tillitis-key1	2022-10-19 09:39:23 +02:00
Joachim Strömbergson	c07c15a8b8	Update README to describe the new ROSC based TRNG	2022-10-19 09:37:58 +02:00
Michael Cardell Widerkrantz	cbe6d3db8d	Use the new firmware-only RAM for CDI computation ... To protect UDS we use a special firmware-only RAM for both the in parameter to the blake2s() function and for the blake2s_ctx.	2022-10-18 14:51:30 +02:00
Michael Cardell Widerkrantz	6d08a82c05	Pass the blake2s_ctx to blake2s() as arg ... Instead of allocating the blake2s_ctx in the blake2s() function we pass it as a pointer as an argument to be able to better control where the variable is in memory.	2022-10-18 14:51:26 +02:00
Joachim Strömbergson	e0d68f3dae	Merge branch 'main' of github.com:tillitis/tillitis-key1	2022-10-18 11:31:42 +02:00
Joachim Strömbergson	ddd969870e	Count from init values to one, not zero	2022-10-18 11:06:40 +02:00
Daniel Lublin	7129205cb0	Add fw_ram size to mem-include	2022-10-17 11:38:04 +02:00
Daniel Lublin	69c3f77e5e	testfw: tidy, clean-up, fmt	2022-10-17 11:15:26 +02:00
Joachim Strömbergson	f6046d55a9	Change ADDR_CTRL to be a pulsed start_stop signal	2022-10-14 08:50:30 +02:00
Joachim Strömbergson	c3f7c5fb06	Ignore the prescaler if prescaler init value is zero	2022-10-13 16:24:03 +02:00
Joachim Strömbergson	2be934ee22	Restore start and stop bits, but clarify in documenation	2022-10-13 16:10:08 +02:00
Joachim Strömbergson	00d180d34e	Change to a single run bit and update access control	2022-10-13 14:58:39 +02:00
Joachim Strömbergson	5e5550461f	Removing confusing negation in message	2022-10-13 13:56:12 +02:00
Joachim Strömbergson	1b03459ab3	Remove app-accessible debug register from mta1 core	2022-10-13 13:51:19 +02:00
Joachim Strömbergson	51a22dc32c	Merge branch 'fw_ram'	2022-10-13 13:16:53 +02:00
Joachim Strömbergson	1f2a585aba	Add test case for fw_ram	2022-10-13 13:16:11 +02:00
Joachim Strömbergson	8e493b6322	Debug fw_ram and add fw_app_mode access control	2022-10-13 13:14:10 +02:00
Joachim Strömbergson	b37b377a7e	Change optimization to Os since we want compact code	2022-10-13 09:26:49 +02:00
Daniel Lublin	55c5081486	Adjust and document the firmware state-machine, including USS ... In particular, order of LOAD_USS and LOAD_APP_SIZE is not required, but the need to send both is documented. This is followed up with adjustment in the host programs' Go code, to try to reinforce this. LoadApp() will take the secretPhrase parameter (to be hashed as USS), and loadUSS() will be unexported. Correct CMD/RSP lengths in pseudo-code.	2022-10-12 15:12:07 +02:00
Joachim Strömbergson	5013338e50	Change to a more descriptive name	2022-10-12 11:14:46 +02:00
Joachim Strömbergson	192ce47fce	Fix #18 with incorrect clock frequency in analysis	2022-10-12 10:25:37 +02:00
Joachim Strömbergson	a9fd26da3b	Fix bit bit width mismatches	2022-10-12 10:21:50 +02:00
Joachim Strömbergson	6ce374cd97	Merge branch 'main' of github.com:tillitis/tillitis-key1	2022-10-12 10:08:16 +02:00
Joachim Strömbergson	82a64f2b2c	Remove DONE state that added one extra final cycle	2022-10-12 10:06:41 +02:00
Daniel Lublin	200ef26f36	Correct	2022-10-11 20:46:21 +02:00
Daniel Lublin	4d927ce426	Fix size_mismatch for testfw	2022-10-11 17:25:19 +02:00
Daniel Lublin	96746b2de0	Clarify BRAM_FW_SIZE	2022-10-11 17:25:00 +02:00
Joachim Strömbergson	cbf1104fed	Write whole byte, not nybbles	2022-10-11 17:05:21 +02:00
Joachim Strömbergson	a51619e5b7	Add fw_ram module	2022-10-11 16:58:26 +02:00
Joachim Strömbergson	24cf80af32	Remove redundant spram module	2022-10-11 13:27:57 +02:00
Joachim Strömbergson	7e0692b150	Replace FiGaRO based TRNG with new ROSC based TRNG	2022-10-11 13:17:04 +02:00
Joachim Strömbergson	af36a40f3e	Merge branch 'new_trng'	2022-10-11 13:00:13 +02:00
Joachim Strömbergson	5087a67376	Reduce FW ROM size to 6 kByte	2022-10-11 12:54:44 +02:00
Joachim Strömbergson	4b929fedf2	Merge branch 'name_version'	2022-10-11 11:30:47 +02:00
Joachim Strömbergson	87dab3fe6d	Remove name, version addresses for cores	2022-10-11 09:55:56 +02:00
Joachim Strömbergson	3f44b999ac	Remove name, version from several cores ... timer touch_sense figaro uart uds	2022-10-11 09:50:45 +02:00
Joachim Strömbergson	cdbe71d40d	Add new ROSC based TRNG with VN decorrelation	2022-10-11 08:45:06 +02:00
Joachim Strömbergson	4ed27b4460	Add new rosc based entropy source	2022-10-08 18:37:48 +02:00
Michael Cardell Widerkrantz	df7a26c28c	Compile firmware with -DNOCONSOLE	2022-10-07 11:19:53 +02:00
Joachim Strömbergson	c90771fe19	Remove API access to current prescaler value	2022-10-06 15:56:13 +02:00
Joachim Strömbergson	cc59d8dc93	Update verilator top level module to match rom module changes	2022-10-06 13:59:01 +02:00
Joachim Strömbergson	c35e7680ea	Squashed commit of the following: ... Silence lint on intentional combinatinal loops Use better instance names, and a single lint pragma for all macros Remove unused pointer update signals Silence lint on wires where not all bits are used Change fw_app_mode to be an input port to allow access control Remove redundant, unused wire mem_busy Add lint pragma to ignore debug register only enabled by a define Remove clk and reset_n ports from the ROM Adding note and lint pragma for rom address width Fix incorrect register widths in uart_core Assign all 16 bits in LUT config Silence lint warnings on macro instances Correct bit extraction for core addresses to be eight bits wide Correct the bit width of cdi_mem_we wire Add specific output file for logging lint issues Correct bit width of tmp_ready to match one bit ready port	2022-10-06 13:23:30 +02:00
Daniel Lublin	2bb62af183	Update bit divisor calc in verilator's uart to our current 18 MHz	2022-10-03 13:11:53 +02:00
Joachim Strömbergson	6f31bbe37a	Merge branch 'main' of github.com:tillitis/tillitis-key1	2022-10-03 12:56:41 +02:00
Joachim Strömbergson	b2ca3f2ea0	Fix Verilator sim by adding separate reset generator	2022-10-03 12:55:24 +02:00
Daniel Lublin	0d16dd5959	Adjust flashing after frequency bump	2022-10-03 08:06:29 +02:00
Daniel Lublin	3f61182a88	Doc how qemu needs to be built; nits	2022-09-30 11:34:09 +02:00
Joachim Strömbergson	1aa2d7bd95	Merge branch 'pll'	2022-09-30 10:06:48 +02:00
Joachim Strömbergson	f41573cc60	Update bit counter to match 18 MHz clock frequency	2022-09-30 10:04:37 +02:00
Joachim Strömbergson	90dc2da8c3	Merge pull request #5 from tillitis/kicad-links ... Fix broken links in kicad library readme	2022-09-30 08:34:53 +02:00
Daniel Lublin	99efb78ed8	Receive USS and hash into CDI ... - We're OK with USS not being loaded, and use an all-zero USS if so. - We require USS to be loaded before app_size (if at all).	2022-09-29 14:58:23 +02:00
Daniel Lublin	df67966d8f	Be consistent and check for errors first	2022-09-28 10:34:48 +02:00
Joachim Strömbergson	f09ff87f9e	Support DIV instructions and catch illegal instructions	2022-09-28 10:29:00 +02:00
Joachim Strömbergson	90a57c4948	Use PLL and global buffer to increas clock speed	2022-09-27 16:41:38 +02:00
Joachim Strömbergson	610522201b	Remove AXI and WB interface modules	2022-09-27 09:48:54 +02:00
Daniel Lublin	10b7951933	Let verilator print when touched by kill -USR1	2022-09-21 11:25:13 +02:00
Daniel Lublin	8066c1092e	Make fmt output changes that will be made	2022-09-21 10:13:39 +02:00
Björn Töpel	2f59eaacdc	Add default values to tpt.py ... Provide default values for vendor id, product id, revision number, and serial number.	2022-09-21 09:49:07 +02:00
Joachim Strömbergson	43ec0641c0	Change uss to ent to remove confusion	2022-09-21 09:38:44 +02:00
Daniel Lublin	40803993e1	Make synth.json depend on data/{uds,udi}.hex; revise docs	2022-09-20 16:37:04 +02:00
Matthew Mets	dc38b1309a	Fix broken links in kicad library readme	2022-09-20 14:08:14 +02:00
Joachim Strömbergson	9d5e1c5ad5	Remove debug output of arguments	2022-09-19 12:37:27 +02:00
Joachim Strömbergson	3110d1218d	Silence lint re missing pins on cell instances	2022-09-19 10:35:49 +02:00
Joachim Strömbergson	715de60f4a	Make initial public release	2022-09-19 08:51:11 +02:00