Support DIV instructions and catch illegal instructions

This commit is contained in:
Joachim Strömbergson 2022-09-28 10:29:00 +02:00
parent 610522201b
commit f09ff87f9e
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@ -165,10 +165,10 @@ module application_fpga(
.TWO_STAGE_SHIFT(0),
.TWO_CYCLE_ALU(0),
.CATCH_MISALIGN(0),
.CATCH_ILLINSN(0),
.CATCH_ILLINSN(1),
.COMPRESSED_ISA(1),
.ENABLE_FAST_MUL(1),
.ENABLE_DIV(0),
.ENABLE_DIV(1),
.BARREL_SHIFTER(1)
) cpu(
.clk(clk),