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Fix #18 with incorrect clock frequency in analysis
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@ -243,7 +243,7 @@ prog_flash_testfw: application_fpga_testfw.bin
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# Post build analysis.
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#-------------------------------------------------------------------
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timing: application_fpga.asc $(P)/data/$(PIN_FILE)
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$(ICESTORM_PATH)icetime -c 12 -tmd up5k -P sg48 -p $(P)/data/$(PIN_FILE) -t $<
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$(ICESTORM_PATH)icetime -c 18 -tmd up5k -P sg48 -p $(P)/data/$(PIN_FILE) -t $<
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view: tb_application_fpga_vcd
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gtkwave $< application_fpga.gtkw
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