Commit Graph

540 Commits

Author SHA1 Message Date
Michael Cardell Widerkrantz
86aedcce69
Revise top-level README for the hardware design
Merged information from fpga.md, and hence fpga.md is removed.
2024-11-20 15:48:49 +01:00
Michael Cardell Widerkrantz
9f975bb66f
Add clangd target
Create a compile_commands.json to help clangd for LSP.
2024-11-15 15:01:31 +01:00
Michael Cardell Widerkrantz
fe8f0b1aa9
doc: Harmonize preformatted in tk1 core
- No unnecessary indentation
- Mark API constants as preformatted
2024-11-15 15:01:31 +01:00
Michael Cardell Widerkrantz
7043521ba9
Move high level system description to README in application_fpga 2024-11-15 15:01:31 +01:00
Michael Cardell Widerkrantz
6e2a77f885
Remove quickstart for the old OSFC dev kit 2024-11-15 15:01:31 +01:00
Jonas Thörnblad
7dc72ade04
Updated application_fpga.bin.sha256 with new hash 2024-11-14 16:35:51 +01:00
Jonas Thörnblad
1b3bae334a
Change "rosc" references to "trng" 2024-11-14 16:35:51 +01:00
Jonas Thörnblad
2364466a9e
Rename rosc.v to trng.v 2024-11-14 16:35:51 +01:00
Jonas Thörnblad
49189a3ba7
Fix typo 2024-11-14 16:35:50 +01:00
Jonas Thörnblad
1ea5db1179
Renamed sb_rgba_drv.v to sb_rgba_drv_sim.v 2024-11-14 16:35:29 +01:00
Jonas Thörnblad
2b89b28b82
Fix small TRNG testbench issues 2024-11-14 11:09:33 +01:00
Daniel Jobson
c4e8f6b6fb
Doc: fix typo of system mode in readme 2024-11-13 14:13:02 +01:00
Daniel Jobson
b90bbea1f6
Remove duplicate entries in default values assignment of tk1 api
cpu_mon_en_we and cdi_mem_we was set twice
2024-11-13 11:16:05 +01:00
Jonas Thörnblad
330146ba3a
Rename top level simulation files
* Rename application_fpga_vsim.v and reset_gen_vsim.v to
  application_fpga_sim.v and reset_gen_sim.v
* Update Makefile
* Fix a typo
2024-11-12 15:33:33 +01:00
Jonas Thörnblad
aea2e319eb
Harmonize the naming of firmware and app mode.
- The API changes name from `_SWITCH_APP` to `_SYSTEM_MODE_CTRL`.
- The registers and wires changes name to `system_mode_*`, instead of a
  mix of `switch_app_*` and `fw_app_mode`.
2024-11-12 15:13:59 +01:00
Daniel Jobson
69ef6dde8b
Remove production_test files
production_test related files are moved out of this repository, since it
relates to production of the hardware and not the fpga construction or
firmware.
2024-10-25 13:20:50 +02:00
Mikael Ågren
a32ecade54
Fix flash target in contrib/Makefile
Setting the working directory to a directory that exist.

Previously the working directory was set to /build/hw/application_fpga.
But that path does not exist since hw/application_fpga was mounted to
/build. Thus resulting in an error:
'Error: workdir "/build/hw/application_fpga" does not exist on
container'
2024-10-25 12:55:27 +02:00
Jonas Thörnblad
c6e8b6930c
Add place and route script
Run multiple threads of nextpnr-ice40 to find a seed that gives a
layout that meets timing.
2024-10-22 15:20:39 +02:00
Jonas Thörnblad
8af048fb9a
Add yosys flags to optimize synthesis
* -abc2, run two passes of 'abc' for slightly improved logic density
  * -device u, optimize timing for up5k device
  * -dff, run 'abc'/'abc9' with -dff (D flip flop) option

  Update digest of application_fpga.bin
2024-10-22 12:46:12 +02:00
Jonas Thörnblad
3514d7ef3c
FPGA: Format verilog code 2024-10-22 12:04:19 +02:00
Jonas Thörnblad
e04aacda48
Add make target to format verilog code using verible-verilog-format
Flags:
        --indentation_spaces=2
        --wrap_end_else_clauses=true

Verify flag, used in checkfmt, only returns error if the last file is
not formatted, temporary fix implemented with grep.
2024-10-22 12:04:19 +02:00
Daniel Jobson
70986a1840
Doc: fix broken links, update system_description regarding data and
address randomization and fix typos
2024-10-17 16:21:32 +02:00
Daniel Jobson
1d6830adf7
Swap to a newer picture of the TKey for the readme 2024-10-17 16:21:32 +02:00
Daniel Jobson
559924868e
Move the boards folder to new repositories
To simplify versioning and isolate the different parts of the projects
to their own repositories, these hardware parts are moved to separate
locations.

- tk1, mta1-usb-dev, mta-usb-v1 and mta1-library moves to
  https://github.com/tillitis/tk1-pcba
- tp1, mta1-usb-programmer, mta1-library and KiCad-RP Pico moves to
  https://github.com/tillitis/tp1
- Relevant documentation referring to these boards are also moved to the
  new repositories, links are updated to point to the new location
- The CERN-OHL-S license is removed from this repo
- CI is no longer building the TP1 firmware
2024-10-17 16:21:24 +02:00
Jonas Thörnblad
f66617431b
Update toolchain with new versions of FPGA tools and remove fw/apps/programmer toolschains
- Change docker image to ubuntu 24.04

 - Add new versions of:
	* clang (18.1.3, part of ubuntu 24.04)
	* icestorm (commit 738af822905fdcf0466e9dd784b9ae4b0b34987f)
	* yosys (0.45)
	* nextpnr (0.7) + extra patches for RNG seed handling and early exit
	* iverilog (v12)
	* verilator (v5.028)
	* verible (v0.0-3795)
	* cocotb (v1.9.1)
 - Remove:
	* gcc-arm-none-eabi
	* libnewlib-arm-none-eabi
	* libstdc++-arm-none-eabi-newlib
	* pico-sdk
	* golang
2024-10-16 18:43:29 +02:00
Jonas Thörnblad
9e57296d91
Include SPI master in default build
This prevents building without the SPI master, the intention is to use
a different method than if-defs, but it will be introduced at a later
stage.
2024-10-16 12:50:32 +02:00
Daniel Jobson
cbb2ba7512
Doc: fix typo in tk1 core readme 2024-10-11 15:50:07 +02:00
Daniel Jobson
d9d41811bd
tb: fix tk1 testbench after name change
This issue was introduced in commit 53c5e707, after name change of RAM
randomization API.
2024-10-11 15:50:07 +02:00
Daniel Jobson
056ee4d3ee
Add make target to clean testbench files
Add it as default in the contrib Makefile.
2024-10-11 15:50:07 +02:00
Daniel Jobson
f13366538e
fw: Fix erroneous type in frame header 2024-10-09 15:52:00 +02:00
Jonas Thörnblad
0ea0eeb967
Fix makefile lines and tee exit status problem
* Break long lines and use tab to indent
* Remove use of "tee" since it messes up the return status
* Remove the generated application_fpga_par.json if nextpnr-ice40 fails
  on timing.
* Change log file ending from .log to .txt
* Fix some spacing
2024-10-08 16:07:17 +02:00
Daniel Jobson
bf1ac5c237
Remove YosysHQ copyright and fix name typo
The removal is coordinated and approved by YosysHQ, and are removed
to keep our headers uniform. These files were written on behalf of
Tillitis.
Two typos was corrected as well.
2024-09-30 15:01:31 +02:00
Daniel Jobson
81950ef7b2
fw: remove warning of missing prototypes when building with QEMU console
enabled.
2024-09-19 16:52:04 +02:00
Daniel Jobson
613316f53e
fw: simplify how to enable QEMU debug in firmware.
- Remove the define `NOCONSOLE`, add define `QEMU_CONSOLE`
- Inverse the use of it, add the define to have QEMU debug output in fw.
- Add a make target `qemu_firmware.elf` which builds the firmware with
  QEMU console enabled.

Co-authored-by: Mikael Ågren <mikael@tillitis.se>
2024-09-19 16:51:55 +02:00
Joachim Strömbergson
35052e50cb
FPGA: Move RAM address and data scrambling into the RAM module.
Move the logic implementing the RAM address and data
	scrambling, descrambling into the RAM module. This cleans up
	the top level, and makes it easier to change the scrambling
	without chaning the top. In order to do correct scrambling the
	address to the RAM core must be 16 bits, not 15.

	Clean up some minor details at the top level, fixing text
        aligment and grouping of ports in instances.

Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2024-08-30 10:53:13 +02:00
Joachim Strömbergson
8d4ad120d6
Doc: Add README for the ROM core.
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2024-08-29 16:06:59 +02:00
Joachim Strömbergson
2d769c5751
Doc: add README for the RAM.
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2024-08-29 16:06:59 +02:00
Joachim Strömbergson
e2de640f01
Doc: Add README for the fw_ram.
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2024-08-29 16:06:59 +02:00
Joachim Strömbergson
c9f5173c18
Doc: Add README for the clock and reset core.
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2024-08-29 16:06:59 +02:00
Joachim Strömbergson
d1cff273d7
FPGA: Move all sub modules into separate cores
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2024-08-29 16:06:58 +02:00
Jonas Thörnblad
b8f22a9810
Log stdout/stderr from yosys and nextpnr-ice40 2024-08-28 14:12:10 +02:00
Joachim Strömbergson
7f93b7817b
FPGA: Add --freq constraint to nextpnr
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2024-08-20 13:45:01 +02:00
Joachim Strömbergson
75b028505f
FPGA: Increase clock frequency to 21 MHz
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2024-08-20 13:45:00 +02:00
Joachim Strömbergson
00599549e3
FPGA: Add system reset API
Add API address to trigger system reset.
      When written to will send system_reset signal
      to the reset generator, which then perform a complete
      reset cycle of the FPGA system.

Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2024-08-20 13:25:22 +02:00
Joachim Strömbergson
b5ba21148d
FPGA: Cleanup tk1 spi testbench
- Remove DUT variables from state display that was removed as part of
  performance fix
- Corrected some incorrect display statements for expected unique ID and
  byte counters

Co-authored-by: Daniel Jobson <jobson@tillitis.se>
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2024-07-11 09:39:31 +02:00
Joachim Strömbergson
4003d6a1c0
FPGA: Improve SPI testing
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2024-07-11 09:38:24 +02:00
Joachim Strömbergson
3d8491af71
FPGA: Move sample point to not miss MISO lsb
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2024-07-11 09:37:46 +02:00
Joachim Strömbergson
53c5e70795
FPGA: Update names for RAM randomization API
Update:
- README
- testbench
- Symbolic names and variables in fw
- registers
- port name and wires
- Update fpga and fw digests

Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2024-07-10 13:45:26 +02:00
Joachim Strömbergson
816718307f
fpga: Fix nits in constant value specification
Remove the preceeding zero in the constant expression
      that cause the simulator to warn about incorrect
      bit size.

Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2024-07-09 10:51:10 +02:00
Michael Cardell Widerkrantz
d297514e7e
doc: Note where doc is to be found
- Not all documentation is in the Dev Handbook.
- Point out README files.
2024-07-01 17:09:29 +02:00