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https://github.com/tillitis/tillitis-key1.git
synced 2024-10-01 01:45:38 -04:00
FPGA: Improve SPI testing
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
This commit is contained in:
Joachim Strömbergson
Daniel Jobson
parent
3d8491af71
commit
4003d6a1c0
@ -70,6 +70,8 @@ module tb_tk1();
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reg [31 : 0] error_ctr;
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reg [31 : 0] tc_ctr;
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reg tb_monitor;
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reg tb_main_monitor;
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reg tb_spi_monitor;
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reg tb_clk;
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reg tb_reset_n;
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@ -191,18 +193,27 @@ module tb_tk1();
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begin : dump_dut_state
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$display("State of DUT at cycle: %08d", cycle_ctr);
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$display("------------");
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$display("Inputs and outputs:");
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$display("tb_cpu_trap: 0x%1x, fw_app_mode: 0x%1x", tb_cpu_trap, tb_fw_app_mode);
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$display("cpu_addr: 0x%08x, cpu_instr: 0x%1x, cpu_valid: 0x%1x, force_tap: 0x%1x",
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tb_cpu_addr, tb_cpu_instr, tb_cpu_valid, tb_force_trap);
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$display("ram_aslr: 0x%08x, ram_scramble: 0x%08x", tb_ram_aslr, tb_ram_scramble);
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$display("led_r: 0x%1x, led_g: 0x%1x, led_b: 0x%1x", tb_led_r, tb_led_g, tb_led_b);
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$display("ready: 0x%1x, cs: 0x%1x, we: 0x%1x, address: 0x%02x", tb_ready, tb_cs, tb_we, tb_address);
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$display("write_data: 0x%08x, read_data: 0x%08x", tb_write_data, tb_read_data);
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$display("");
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if (tb_main_monitor) begin
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$display("Inputs and outputs:");
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$display("tb_cpu_trap: 0x%1x, fw_app_mode: 0x%1x", tb_cpu_trap, tb_fw_app_mode);
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$display("cpu_addr: 0x%08x, cpu_instr: 0x%1x, cpu_valid: 0x%1x, force_tap: 0x%1x",
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tb_cpu_addr, tb_cpu_instr, tb_cpu_valid, tb_force_trap);
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$display("ram_aslr: 0x%08x, ram_scramble: 0x%08x", tb_ram_aslr, tb_ram_scramble);
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$display("led_r: 0x%1x, led_g: 0x%1x, led_b: 0x%1x", tb_led_r, tb_led_g, tb_led_b);
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$display("ready: 0x%1x, cs: 0x%1x, we: 0x%1x, address: 0x%02x", tb_ready, tb_cs, tb_we, tb_address);
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$display("write_data: 0x%08x, read_data: 0x%08x", tb_write_data, tb_read_data);
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$display("");
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$display("Internal state:");
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$display("tmp_read_ready: 0x%1x, tmp_read_data: 0x%08x", dut.tmp_ready, dut.tmp_read_data);
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$display("Internal state:");
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$display("tmp_read_ready: 0x%1x, tmp_read_data: 0x%08x", dut.tmp_ready, dut.tmp_read_data);
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$display("");
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end
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if (tb_spi_monitor) begin
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$display("SPI I/O and internal state:");
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$display("spi_ss: 0x%1x, spi_sck: 0x%1x, spi_mosi: 0x%1x, spi_miso: 0x%1x",
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tb_spi_ss, tb_spi_sck, tb_spi_mosi, tb_spi_miso);
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end
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$display("");
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$display("");
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@ -238,8 +249,7 @@ module tb_tk1();
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end
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else
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begin
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$display("--- %02d tests completed - %02d test cases did not complete successfully.",
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tc_ctr, error_ctr);
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$display("--- %02d tests completed - %02d errors detected.", tc_ctr, error_ctr);
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end
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end
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endtask // display_test_result
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@ -253,26 +263,27 @@ module tb_tk1();
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//----------------------------------------------------------------
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task init_sim;
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begin
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cycle_ctr = 0;
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error_ctr = 0;
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tc_ctr = 0;
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tb_monitor = 0;
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cycle_ctr = 0;
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error_ctr = 0;
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tc_ctr = 0;
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tb_monitor = 0;
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tb_main_monitor = 0;
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tb_spi_monitor = 0;
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tb_clk = 1'h0;
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tb_reset_n = 1'h1;
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tb_clk = 1'h0;
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tb_reset_n = 1'h1;
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tb_cpu_addr = 32'h0;
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tb_cpu_instr = 1'h0;
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tb_cpu_valid = 1'h0;
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tb_cpu_trap = 1'h0;
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tb_cpu_addr = 32'h0;
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tb_cpu_instr = 1'h0;
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tb_cpu_valid = 1'h0;
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tb_cpu_trap = 1'h0;
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tb_gpio1 = 1'h0;
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tb_gpio2 = 1'h0;
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tb_gpio1 = 1'h0;
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tb_gpio2 = 1'h0;
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tb_cs = 1'h0;
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tb_we = 1'h0;
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tb_address = 8'h0;
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tb_write_data = 32'h0;
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tb_cs = 1'h0;
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tb_we = 1'h0;
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tb_address = 8'h0;
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tb_write_data = 32'h0;
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end
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endtask // init_sim
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@ -307,20 +318,46 @@ module tb_tk1();
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//
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// Read a data word from the given address in the DUT.
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// the word read will be available in the global variable
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// read_data.
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// tb_read_data.
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//----------------------------------------------------------------
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task read_word(input [11 : 0] address, input [31 : 0] expected);
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task read_word(input [11 : 0] address);
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begin : read_word
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reg [31 : 0] read_data;
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tb_address = address;
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tb_cs = 1'h1;
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tb_address = address;
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tb_cs = 1'h1;
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#(CLK_HALF_PERIOD);
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#(CLK_PERIOD);
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read_data = tb_read_data;
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#(CLK_HALF_PERIOD);
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tb_cs = 1'h0;
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#(CLK_PERIOD);
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tb_cs = 1'h0;
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end
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endtask // read_word
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//----------------------------------------------------------------
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// read_check_word()
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//
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// Read a data word from the given address in the DUT.
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// the word read will be available in the global variable
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// read_data.
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//
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// The function also checks that the data read matches
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// the expected value or not.
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//----------------------------------------------------------------
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task read_check_word(input [11 : 0] address, input [31 : 0] expected);
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begin : read_check_word
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reg [31 : 0] read_data;
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tb_address = address;
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tb_cs = 1'h1;
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#(CLK_PERIOD);
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read_data = tb_read_data;
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#(CLK_PERIOD);
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tb_cs = 1'h0;
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if (DEBUG)
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begin
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@ -334,7 +371,7 @@ module tb_tk1();
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$display("");
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end
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end
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endtask // read_word
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endtask // read_check_word
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//----------------------------------------------------------------
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@ -348,9 +385,9 @@ module tb_tk1();
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$display("");
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$display("--- test1: Read out name and version started.");
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read_word(ADDR_NAME0, 32'h746B3120);
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read_word(ADDR_NAME1, 32'h6d6b6466);
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read_word(ADDR_VERSION, 32'h00000005);
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read_check_word(ADDR_NAME0, 32'h746B3120);
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read_check_word(ADDR_NAME1, 32'h6d6b6466);
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read_check_word(ADDR_VERSION, 32'h00000005);
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$display("--- test1: completed.");
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$display("");
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@ -369,8 +406,8 @@ module tb_tk1();
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$display("");
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$display("--- test2: Read out UDI started.");
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read_word(ADDR_UDI_FIRST, 32'h00010203);
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read_word(ADDR_UDI_LAST, 32'h04050607);
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read_check_word(ADDR_UDI_FIRST, 32'h00010203);
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read_check_word(ADDR_UDI_LAST, 32'h04050607);
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$display("--- test2: completed.");
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$display("");
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@ -399,14 +436,14 @@ module tb_tk1();
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write_word(ADDR_CDI_FIRST + 7, 32'h70717273);
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$display("--- test3: Read CDI.");
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read_word(ADDR_CDI_FIRST + 0, 32'hf0f1f2f3);
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read_word(ADDR_CDI_FIRST + 1, 32'he0e1e2e3);
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read_word(ADDR_CDI_FIRST + 2, 32'hd0d1d2d3);
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read_word(ADDR_CDI_FIRST + 3, 32'hc0c1c2c3);
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read_word(ADDR_CDI_FIRST + 4, 32'ha0a1a2a3);
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read_word(ADDR_CDI_FIRST + 5, 32'h90919293);
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read_word(ADDR_CDI_FIRST + 6, 32'h80818283);
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read_word(ADDR_CDI_LAST + 0, 32'h70717273);
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read_check_word(ADDR_CDI_FIRST + 0, 32'hf0f1f2f3);
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read_check_word(ADDR_CDI_FIRST + 1, 32'he0e1e2e3);
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read_check_word(ADDR_CDI_FIRST + 2, 32'hd0d1d2d3);
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read_check_word(ADDR_CDI_FIRST + 3, 32'hc0c1c2c3);
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read_check_word(ADDR_CDI_FIRST + 4, 32'ha0a1a2a3);
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read_check_word(ADDR_CDI_FIRST + 5, 32'h90919293);
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read_check_word(ADDR_CDI_FIRST + 6, 32'h80818283);
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read_check_word(ADDR_CDI_LAST + 0, 32'h70717273);
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$display("--- test3: Switch to app mode.");
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write_word(ADDR_SWITCH_APP, 32'hdeadbeef);
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@ -422,14 +459,14 @@ module tb_tk1();
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write_word(ADDR_CDI_FIRST + 7, 32'h7f7e7d7c);
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$display("--- test3: Read CDI again.");
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read_word(ADDR_CDI_FIRST + 0, 32'hf0f1f2f3);
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read_word(ADDR_CDI_FIRST + 1, 32'he0e1e2e3);
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read_word(ADDR_CDI_FIRST + 2, 32'hd0d1d2d3);
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read_word(ADDR_CDI_FIRST + 3, 32'hc0c1c2c3);
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read_word(ADDR_CDI_FIRST + 4, 32'ha0a1a2a3);
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read_word(ADDR_CDI_FIRST + 5, 32'h90919293);
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read_word(ADDR_CDI_FIRST + 6, 32'h80818283);
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read_word(ADDR_CDI_LAST + 0, 32'h70717273);
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read_check_word(ADDR_CDI_FIRST + 0, 32'hf0f1f2f3);
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read_check_word(ADDR_CDI_FIRST + 1, 32'he0e1e2e3);
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read_check_word(ADDR_CDI_FIRST + 2, 32'hd0d1d2d3);
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read_check_word(ADDR_CDI_FIRST + 3, 32'hc0c1c2c3);
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read_check_word(ADDR_CDI_FIRST + 4, 32'ha0a1a2a3);
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read_check_word(ADDR_CDI_FIRST + 5, 32'h90919293);
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read_check_word(ADDR_CDI_FIRST + 6, 32'h80818283);
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read_check_word(ADDR_CDI_LAST + 0, 32'h70717273);
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$display("--- test3: completed.");
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$display("");
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@ -454,7 +491,7 @@ module tb_tk1();
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write_word(ADDR_BLAKE2S, 32'hcafebabe);
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$display("--- test4: Read Blake2s entry point.");
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read_word(ADDR_BLAKE2S, 32'hcafebabe);
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read_check_word(ADDR_BLAKE2S, 32'hcafebabe);
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$display("--- test4: Switch to app mode.");
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write_word(ADDR_SWITCH_APP, 32'hf00ff00f);
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@ -463,7 +500,7 @@ module tb_tk1();
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write_word(ADDR_BLAKE2S, 32'hdeadbeef);
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$display("--- test4: Read Blake2s entry point again");
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read_word(ADDR_BLAKE2S, 32'hcafebabe);
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read_check_word(ADDR_BLAKE2S, 32'hcafebabe);
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$display("--- test4: completed.");
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$display("");
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@ -489,8 +526,8 @@ module tb_tk1();
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write_word(ADDR_APP_SIZE, 32'h47114711);
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$display("--- test5: Read app start address and size.");
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read_word(ADDR_APP_START, 32'h13371337);
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read_word(ADDR_APP_SIZE, 32'h47114711);
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read_check_word(ADDR_APP_START, 32'h13371337);
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read_check_word(ADDR_APP_SIZE, 32'h47114711);
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$display("--- test5: Switch to app mode.");
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write_word(ADDR_SWITCH_APP, 32'hf000000);
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@ -500,8 +537,8 @@ module tb_tk1();
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write_word(ADDR_APP_SIZE, 32'hf00ff00f);
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$display("--- test5: Read app start address and size.");
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read_word(ADDR_APP_START, 32'h13371337);
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read_word(ADDR_APP_SIZE, 32'h47114711);
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read_check_word(ADDR_APP_START, 32'h13371337);
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read_check_word(ADDR_APP_SIZE, 32'h47114711);
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$display("--- test5: completed.");
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$display("");
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@ -583,7 +620,7 @@ module tb_tk1();
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tb_gpio2 = 1'h1;
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#(2 * CLK_PERIOD);
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$display("--- test8: Check that we can read GPIO 1 and 2 as high.");
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read_word(ADDR_GPIO, 32'h3);
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read_check_word(ADDR_GPIO, 32'h3);
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$display("--- test8: Set GPIO 3 and 4 high by writing to the registers.");
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write_word(ADDR_GPIO, 32'hf);
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@ -644,23 +681,34 @@ module tb_tk1();
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task test10;
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begin
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tc_ctr = tc_ctr + 1;
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tb_monitor = 0;
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tb_spi_monitor = 0;
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$display("");
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$display("--- test10: Loopback in SPI Master started.");
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#(CLK_PERIOD);
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// Sending 0xa7 trough the inverting loopback.
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$display("--- test10: Sending a byte.");
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write_word(ADDR_SPI_EN, 32'h1);
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write_word(ADDR_SPI_DATA, 32'ha7);
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write_word(ADDR_SPI_XFER, 32'h1);
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while (!dut.spi_ready) begin
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#(CLK_PERIOD);
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// Ready ready flag in SPI until it is set.
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read_word(ADDR_SPI_XFER);
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while (!tb_read_data) begin
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read_word(ADDR_SPI_XFER);
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end
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$display("--- test10: Byte should have been sent.");
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write_word(ADDR_SPI_EN, 32'h0);
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// 0x58 is the inverse of 0xa7.
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read_word(ADDR_SPI_DATA, 32'h58);
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#(2 * CLK_PERIOD);
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read_check_word(ADDR_SPI_DATA, 32'h58);
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write_word(ADDR_SPI_EN, 32'h0);
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tb_monitor = 0;
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tb_spi_monitor = 0;
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$display("--- test10: completed.");
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$display("");
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