mirror of
https://github.com/tillitis/tillitis-key1.git
synced 2024-12-24 06:59:24 -05:00
Move the boards
folder to new repositories
To simplify versioning and isolate the different parts of the projects to their own repositories, these hardware parts are moved to separate locations. - tk1, mta1-usb-dev, mta-usb-v1 and mta1-library moves to https://github.com/tillitis/tk1-pcba - tp1, mta1-usb-programmer, mta1-library and KiCad-RP Pico moves to https://github.com/tillitis/tp1 - Relevant documentation referring to these boards are also moved to the new repositories, links are updated to point to the new location - The CERN-OHL-S license is removed from this repo - CI is no longer building the TP1 firmware
This commit is contained in:
parent
f66617431b
commit
559924868e
6
.github/workflows/ci.yaml
vendored
6
.github/workflows/ci.yaml
vendored
@ -61,7 +61,7 @@ jobs:
|
||||
working-directory: hw/application_fpga
|
||||
run: make lint
|
||||
|
||||
build-other-firmwares:
|
||||
build-usb-firmware:
|
||||
runs-on: ubuntu-latest
|
||||
container:
|
||||
image: ghcr.io/tillitis/tkey-builder:4
|
||||
@ -81,10 +81,6 @@ jobs:
|
||||
working-directory: hw/usb_interface/ch552_fw
|
||||
run: make
|
||||
|
||||
- name: compile tp1 firmware
|
||||
working-directory: hw/boards/tp1/firmware
|
||||
run: ./build.sh
|
||||
|
||||
build-bitstream:
|
||||
outputs:
|
||||
commit_sha: ${{ github.sha }}
|
||||
|
19
.gitignore
vendored
19
.gitignore
vendored
@ -45,22 +45,3 @@ application_fpga_par.txt
|
||||
.*.swp
|
||||
*.sch-bak
|
||||
*.sim
|
||||
|
||||
# Ignore list for KiCAD Projects
|
||||
*.000
|
||||
*.bak
|
||||
*.bck
|
||||
*.kicad_pcb-bak
|
||||
*.sch-bak
|
||||
_autosave-*
|
||||
*-backups
|
||||
\#auto_saved_files#
|
||||
*.tmp
|
||||
*-save.pro
|
||||
*-save.kicad_pcb
|
||||
fp-info-cache
|
||||
*.net
|
||||
*.dsn
|
||||
*.ses
|
||||
__pycache__
|
||||
MEM.TXT
|
||||
|
@ -3,9 +3,7 @@
|
||||
## Main license
|
||||
|
||||
Unless otherwise noted, the project sources are licensed under the
|
||||
terms and conditions of the "GNU General Public License v2.0 only" and
|
||||
hardware boards under "CERN Open Hardware Licence Version 2 - Strongly
|
||||
Reciprocal".
|
||||
terms and conditions of the "GNU General Public License v2.0 only".
|
||||
|
||||
The `LICENSES/` directory contains copies of the license texts used by
|
||||
the sources included in the project source tree.
|
||||
|
@ -1,289 +0,0 @@
|
||||
CERN Open Hardware Licence Version 2 - Strongly Reciprocal
|
||||
|
||||
|
||||
Preamble
|
||||
|
||||
CERN has developed this licence to promote collaboration among
|
||||
hardware designers and to provide a legal tool which supports the
|
||||
freedom to use, study, modify, share and distribute hardware designs
|
||||
and products based on those designs. Version 2 of the CERN Open
|
||||
Hardware Licence comes in three variants: CERN-OHL-P (permissive); and
|
||||
two reciprocal licences: CERN-OHL-W (weakly reciprocal) and this
|
||||
licence, CERN-OHL-S (strongly reciprocal).
|
||||
|
||||
The CERN-OHL-S is copyright CERN 2020. Anyone is welcome to use it, in
|
||||
unmodified form only.
|
||||
|
||||
Use of this Licence does not imply any endorsement by CERN of any
|
||||
Licensor or their designs nor does it imply any involvement by CERN in
|
||||
their development.
|
||||
|
||||
|
||||
1 Definitions
|
||||
|
||||
1.1 'Licence' means this CERN-OHL-S.
|
||||
|
||||
1.2 'Compatible Licence' means
|
||||
|
||||
a) any earlier version of the CERN Open Hardware licence, or
|
||||
|
||||
b) any version of the CERN-OHL-S, or
|
||||
|
||||
c) any licence which permits You to treat the Source to which
|
||||
it applies as licensed under CERN-OHL-S provided that on
|
||||
Conveyance of any such Source, or any associated Product You
|
||||
treat the Source in question as being licensed under
|
||||
CERN-OHL-S.
|
||||
|
||||
1.3 'Source' means information such as design materials or digital
|
||||
code which can be applied to Make or test a Product or to
|
||||
prepare a Product for use, Conveyance or sale, regardless of its
|
||||
medium or how it is expressed. It may include Notices.
|
||||
|
||||
1.4 'Covered Source' means Source that is explicitly made available
|
||||
under this Licence.
|
||||
|
||||
1.5 'Product' means any device, component, work or physical object,
|
||||
whether in finished or intermediate form, arising from the use,
|
||||
application or processing of Covered Source.
|
||||
|
||||
1.6 'Make' means to create or configure something, whether by
|
||||
manufacture, assembly, compiling, loading or applying Covered
|
||||
Source or another Product or otherwise.
|
||||
|
||||
1.7 'Available Component' means any part, sub-assembly, library or
|
||||
code which:
|
||||
|
||||
a) is licensed to You as Complete Source under a Compatible
|
||||
Licence; or
|
||||
|
||||
b) is available, at the time a Product or the Source containing
|
||||
it is first Conveyed, to You and any other prospective
|
||||
licensees
|
||||
|
||||
i) as a physical part with sufficient rights and
|
||||
information (including any configuration and
|
||||
programming files and information about its
|
||||
characteristics and interfaces) to enable it either to
|
||||
be Made itself, or to be sourced and used to Make the
|
||||
Product; or
|
||||
ii) as part of the normal distribution of a tool used to
|
||||
design or Make the Product.
|
||||
|
||||
1.8 'Complete Source' means the set of all Source necessary to Make
|
||||
a Product, in the preferred form for making modifications,
|
||||
including necessary installation and interfacing information
|
||||
both for the Product, and for any included Available Components.
|
||||
If the format is proprietary, it must also be made available in
|
||||
a format (if the proprietary tool can create it) which is
|
||||
viewable with a tool available to potential licensees and
|
||||
licensed under a licence approved by the Free Software
|
||||
Foundation or the Open Source Initiative. Complete Source need
|
||||
not include the Source of any Available Component, provided that
|
||||
You include in the Complete Source sufficient information to
|
||||
enable a recipient to Make or source and use the Available
|
||||
Component to Make the Product.
|
||||
|
||||
1.9 'Source Location' means a location where a Licensor has placed
|
||||
Covered Source, and which that Licensor reasonably believes will
|
||||
remain easily accessible for at least three years for anyone to
|
||||
obtain a digital copy.
|
||||
|
||||
1.10 'Notice' means copyright, acknowledgement and trademark notices,
|
||||
Source Location references, modification notices (subsection
|
||||
3.3(b)) and all notices that refer to this Licence and to the
|
||||
disclaimer of warranties that are included in the Covered
|
||||
Source.
|
||||
|
||||
1.11 'Licensee' or 'You' means any person exercising rights under
|
||||
this Licence.
|
||||
|
||||
1.12 'Licensor' means a natural or legal person who creates or
|
||||
modifies Covered Source. A person may be a Licensee and a
|
||||
Licensor at the same time.
|
||||
|
||||
1.13 'Convey' means to communicate to the public or distribute.
|
||||
|
||||
|
||||
2 Applicability
|
||||
|
||||
2.1 This Licence governs the use, copying, modification, Conveying
|
||||
of Covered Source and Products, and the Making of Products. By
|
||||
exercising any right granted under this Licence, You irrevocably
|
||||
accept these terms and conditions.
|
||||
|
||||
2.2 This Licence is granted by the Licensor directly to You, and
|
||||
shall apply worldwide and without limitation in time.
|
||||
|
||||
2.3 You shall not attempt to restrict by contract or otherwise the
|
||||
rights granted under this Licence to other Licensees.
|
||||
|
||||
2.4 This Licence is not intended to restrict fair use, fair dealing,
|
||||
or any other similar right.
|
||||
|
||||
|
||||
3 Copying, Modifying and Conveying Covered Source
|
||||
|
||||
3.1 You may copy and Convey verbatim copies of Covered Source, in
|
||||
any medium, provided You retain all Notices.
|
||||
|
||||
3.2 You may modify Covered Source, other than Notices, provided that
|
||||
You irrevocably undertake to make that modified Covered Source
|
||||
available from a Source Location should You Convey a Product in
|
||||
circumstances where the recipient does not otherwise receive a
|
||||
copy of the modified Covered Source. In each case subsection 3.3
|
||||
shall apply.
|
||||
|
||||
You may only delete Notices if they are no longer applicable to
|
||||
the corresponding Covered Source as modified by You and You may
|
||||
add additional Notices applicable to Your modifications.
|
||||
Including Covered Source in a larger work is modifying the
|
||||
Covered Source, and the larger work becomes modified Covered
|
||||
Source.
|
||||
|
||||
3.3 You may Convey modified Covered Source (with the effect that You
|
||||
shall also become a Licensor) provided that You:
|
||||
|
||||
a) retain Notices as required in subsection 3.2;
|
||||
|
||||
b) add a Notice to the modified Covered Source stating that You
|
||||
have modified it, with the date and brief description of how
|
||||
You have modified it;
|
||||
|
||||
c) add a Source Location Notice for the modified Covered Source
|
||||
if You Convey in circumstances where the recipient does not
|
||||
otherwise receive a copy of the modified Covered Source; and
|
||||
|
||||
d) license the modified Covered Source under the terms and
|
||||
conditions of this Licence (or, as set out in subsection
|
||||
8.3, a later version, if permitted by the licence of the
|
||||
original Covered Source). Such modified Covered Source must
|
||||
be licensed as a whole, but excluding Available Components
|
||||
contained in it, which remain licensed under their own
|
||||
applicable licences.
|
||||
|
||||
|
||||
4 Making and Conveying Products
|
||||
|
||||
You may Make Products, and/or Convey them, provided that You either
|
||||
provide each recipient with a copy of the Complete Source or ensure
|
||||
that each recipient is notified of the Source Location of the Complete
|
||||
Source. That Complete Source is Covered Source, and You must
|
||||
accordingly satisfy Your obligations set out in subsection 3.3. If
|
||||
specified in a Notice, the Product must visibly and securely display
|
||||
the Source Location on it or its packaging or documentation in the
|
||||
manner specified in that Notice.
|
||||
|
||||
|
||||
5 Research and Development
|
||||
|
||||
You may Convey Covered Source, modified Covered Source or Products to
|
||||
a legal entity carrying out development, testing or quality assurance
|
||||
work on Your behalf provided that the work is performed on terms which
|
||||
prevent the entity from both using the Source or Products for its own
|
||||
internal purposes and Conveying the Source or Products or any
|
||||
modifications to them to any person other than You. Any modifications
|
||||
made by the entity shall be deemed to be made by You pursuant to
|
||||
subsection 3.2.
|
||||
|
||||
|
||||
6 DISCLAIMER AND LIABILITY
|
||||
|
||||
6.1 DISCLAIMER OF WARRANTY -- The Covered Source and any Products
|
||||
are provided 'as is' and any express or implied warranties,
|
||||
including, but not limited to, implied warranties of
|
||||
merchantability, of satisfactory quality, non-infringement of
|
||||
third party rights, and fitness for a particular purpose or use
|
||||
are disclaimed in respect of any Source or Product to the
|
||||
maximum extent permitted by law. The Licensor makes no
|
||||
representation that any Source or Product does not or will not
|
||||
infringe any patent, copyright, trade secret or other
|
||||
proprietary right. The entire risk as to the use, quality, and
|
||||
performance of any Source or Product shall be with You and not
|
||||
the Licensor. This disclaimer of warranty is an essential part
|
||||
of this Licence and a condition for the grant of any rights
|
||||
granted under this Licence.
|
||||
|
||||
6.2 EXCLUSION AND LIMITATION OF LIABILITY -- The Licensor shall, to
|
||||
the maximum extent permitted by law, have no liability for
|
||||
direct, indirect, special, incidental, consequential, exemplary,
|
||||
punitive or other damages of any character including, without
|
||||
limitation, procurement of substitute goods or services, loss of
|
||||
use, data or profits, or business interruption, however caused
|
||||
and on any theory of contract, warranty, tort (including
|
||||
negligence), product liability or otherwise, arising in any way
|
||||
in relation to the Covered Source, modified Covered Source
|
||||
and/or the Making or Conveyance of a Product, even if advised of
|
||||
the possibility of such damages, and You shall hold the
|
||||
Licensor(s) free and harmless from any liability, costs,
|
||||
damages, fees and expenses, including claims by third parties,
|
||||
in relation to such use.
|
||||
|
||||
|
||||
7 Patents
|
||||
|
||||
7.1 Subject to the terms and conditions of this Licence, each
|
||||
Licensor hereby grants to You a perpetual, worldwide,
|
||||
non-exclusive, no-charge, royalty-free, irrevocable (except as
|
||||
stated in subsections 7.2 and 8.4) patent licence to Make, have
|
||||
Made, use, offer to sell, sell, import, and otherwise transfer
|
||||
the Covered Source and Products, where such licence applies only
|
||||
to those patent claims licensable by such Licensor that are
|
||||
necessarily infringed by exercising rights under the Covered
|
||||
Source as Conveyed by that Licensor.
|
||||
|
||||
7.2 If You institute patent litigation against any entity (including
|
||||
a cross-claim or counterclaim in a lawsuit) alleging that the
|
||||
Covered Source or a Product constitutes direct or contributory
|
||||
patent infringement, or You seek any declaration that a patent
|
||||
licensed to You under this Licence is invalid or unenforceable
|
||||
then any rights granted to You under this Licence shall
|
||||
terminate as of the date such process is initiated.
|
||||
|
||||
|
||||
8 General
|
||||
|
||||
8.1 If any provisions of this Licence are or subsequently become
|
||||
invalid or unenforceable for any reason, the remaining
|
||||
provisions shall remain effective.
|
||||
|
||||
8.2 You shall not use any of the name (including acronyms and
|
||||
abbreviations), image, or logo by which the Licensor or CERN is
|
||||
known, except where needed to comply with section 3, or where
|
||||
the use is otherwise allowed by law. Any such permitted use
|
||||
shall be factual and shall not be made so as to suggest any kind
|
||||
of endorsement or implication of involvement by the Licensor or
|
||||
its personnel.
|
||||
|
||||
8.3 CERN may publish updated versions and variants of this Licence
|
||||
which it considers to be in the spirit of this version, but may
|
||||
differ in detail to address new problems or concerns. New
|
||||
versions will be published with a unique version number and a
|
||||
variant identifier specifying the variant. If the Licensor has
|
||||
specified that a given variant applies to the Covered Source
|
||||
without specifying a version, You may treat that Covered Source
|
||||
as being released under any version of the CERN-OHL with that
|
||||
variant. If no variant is specified, the Covered Source shall be
|
||||
treated as being released under CERN-OHL-S. The Licensor may
|
||||
also specify that the Covered Source is subject to a specific
|
||||
version of the CERN-OHL or any later version in which case You
|
||||
may apply this or any later version of CERN-OHL with the same
|
||||
variant identifier published by CERN.
|
||||
|
||||
8.4 This Licence shall terminate with immediate effect if You fail
|
||||
to comply with any of its terms and conditions.
|
||||
|
||||
8.5 However, if You cease all breaches of this Licence, then Your
|
||||
Licence from any Licensor is reinstated unless such Licensor has
|
||||
terminated this Licence by giving You, while You remain in
|
||||
breach, a notice specifying the breach and requiring You to cure
|
||||
it within 30 days, and You have failed to come into compliance
|
||||
in all material respects by the end of the 30 day period. Should
|
||||
You repeat the breach after receipt of a cure notice and
|
||||
subsequent reinstatement, this Licence will terminate
|
||||
immediately and permanently. Section 6 shall continue to apply
|
||||
after any termination.
|
||||
|
||||
8.6 This Licence shall not be enforceable except by a Licensor
|
||||
acting as such, and third party beneficiary rights are
|
||||
specifically excluded.
|
27
README.md
27
README.md
@ -56,7 +56,7 @@ Specific documentation regarding implementation is kept close to the
|
||||
code/design in README files, typically in the same directory.
|
||||
|
||||
## Tkey Device Apps
|
||||
Offically supported apps can be found at
|
||||
Officially supported apps can be found at
|
||||
[tillitis.se](https://tillitis.se/download/)
|
||||
|
||||
The source and other projects from us can be found here at our
|
||||
@ -65,14 +65,24 @@ The source and other projects from us can be found here at our
|
||||
Other known (but not all) projects can be found at
|
||||
[dev.tillitis.se](https://dev.tillitis.se/projects/).
|
||||
|
||||
### Other noteworthy links
|
||||
## PCB and programmer
|
||||
|
||||
The TKey PCB [KiCad](https://www.kicad.org/) design files are kept in
|
||||
a separate repository:
|
||||
|
||||
https://github.com/tillitis/tk1-pcba
|
||||
|
||||
The TP1 (TKey programmer 1) PCB design files and firmware are kept in:
|
||||
|
||||
https://github.com/tillitis/tp1
|
||||
|
||||
## Other noteworthy links
|
||||
|
||||
* [Threat Model](doc/threat_model/threat_model.md)
|
||||
* [Release Notes](doc/release_notes.md)
|
||||
* [Quickstart for the DevKit](doc/quickstart.md). Initial programming
|
||||
if you have the "old" DevKit.
|
||||
|
||||
|
||||
Note that development is ongoing. To avoid unexpected changes of
|
||||
derived key material, please use a tagged release. Read the [Release
|
||||
Notes](doc/release_notes.md) to keep up to date with changes and new
|
||||
@ -80,12 +90,13 @@ releases.
|
||||
|
||||
## About this repository
|
||||
|
||||
This repository contains hardware, firmware and utilities written as
|
||||
part of the TKey. It is structured as monolithic repository, or
|
||||
"monorepo", where all components live in one repository.
|
||||
This repository contains the FPGA design, firmware/bootloader, and the
|
||||
USB controller firmware.
|
||||
|
||||
Device and client applications, however, are kept in other
|
||||
repositories here at our [GitHub](https://github.com/tillitis).
|
||||
The PCB design files, device and client applications are kept in other
|
||||
repositories. See:
|
||||
|
||||
https://github.com/tillitis
|
||||
|
||||
## Licensing
|
||||
|
||||
|
Binary file not shown.
Before Width: | Height: | Size: 116 KiB |
Binary file not shown.
Before Width: | Height: | Size: 253 KiB |
@ -1,94 +0,0 @@
|
||||
# Tillitis PCB designs
|
||||
|
||||
## Introduction
|
||||
|
||||
Tillitis develop boards (PCBs) and enclposures for the TKey devices as
|
||||
well support systems such as FPGA programmers. Tillitis use open source
|
||||
tools for the PCB designs.
|
||||
|
||||
|
||||
## Boards
|
||||
|
||||
The KiCad board projects all follow this directory structure:
|
||||
|
||||
| Path | Description |
|
||||
| --- | --- |
|
||||
| /project | KiCad 6 project |
|
||||
| /project/gerbers | PCB release files |
|
||||
| /project/test | Scripts / gateware used for production tests |
|
||||
|
||||
### TKey 1 (TK1)
|
||||
|
||||
![](../../doc/images/mta1-usb-v1.jpg)
|
||||
|
||||
This is the first production version of the TKey design.
|
||||
|
||||
Main features:
|
||||
* Miniaturized hardware the size of a small USB stick.
|
||||
|
||||
* The Interface FPGA from the MTA1-USB-DEV design has been replaced with an Interface
|
||||
MCU running a USB-to-Serial converter firmware. This was done to ease development
|
||||
of the FPGA design.
|
||||
|
||||
* A touch sensor IC is provided instead of the switch for user presence detection.
|
||||
|
||||
* Test pads are provided on the bottom of the board for programming the SPI flash,
|
||||
and also for measuring extra GPIO pins. The 'MTA1-USB-V1-Programmer' board is
|
||||
designed to support this.
|
||||
|
||||
|
||||
### mta1-usb-v1-programmer
|
||||
|
||||
![](../../doc/images/mta1-usb-v1-programmer.jpg)
|
||||
|
||||
This is a programming jig for TKey 1 (the mta1-usb-v1) board The progamming board is based
|
||||
around a on a Raspberry Pi Pico running a custom firmware developed by Blinkinlabs.
|
||||
|
||||
The source code for this firnware [is available on Github](https://github.com/Blinkinlabs/ice40_flasher).
|
||||
There is also a [pre built firmware binary available for the programmer board](https://github.com/Blinkinlabs/ice40_flasher/tree/main/bin)
|
||||
|
||||
|
||||
### mta1-usb-dev
|
||||
|
||||
![](../../doc/images/mta1-usb-dev.jpg)
|
||||
|
||||
This is the original TKey design, intended as a development platform. It is a larger PCB,
|
||||
that connects to a PC via a USB C cable.
|
||||
|
||||
Main features:
|
||||
* 2 ICE40 FPGAs.
|
||||
|
||||
* The first ICE40 (Interface FPGA) is connected to a USB C plug, and is loaded with a
|
||||
gateware that contains a soft USB device. This gateware acts as an USB-to-GPIO
|
||||
interface to the second ICE40.
|
||||
|
||||
* The second ICE40 (application FPGA) is loaded with a RISC-V soft core containing
|
||||
the security firmware. User applications are run on this gateware.
|
||||
|
||||
* The second ICE40 also has an input button for user presenence detection.
|
||||
|
||||
* An FTDI module is included for programming both the Application and Interface FPGAs.
|
||||
|
||||
* Both ICE40s can be configured to boot from included SPI flash memories, NVCM,
|
||||
or be live programmed from the FTDI module.
|
||||
|
||||
* All GPIO lines between the two FPGAs, as well as all programming signals, are
|
||||
exposed on 0.1" headers for probing.
|
||||
|
||||
|
||||
## Libraries
|
||||
|
||||
### mta1-library
|
||||
|
||||
This is a shared KiCad library for all boards in the project.
|
||||
|
||||
|
||||
### KiCad-RP Pico
|
||||
|
||||
This is a KiCad library for the Raspberry Pi Pico symbol and footprint. It was extracted from
|
||||
the [Kicad-RP-Pico](https://github.com/ncarandini/KiCad-RP-Pico) project. It is licensed under
|
||||
the [Creative Commons CC-BY-SA 4.0 License](https://creativecommons.org/licenses/by-sa/4.0/legalcode),
|
||||
with an exception exempting waving any control of derived works.
|
||||
|
||||
|
||||
---
|
@ -56,7 +56,7 @@ Bus 001 Device 023: ID 1209:8886 Generic TP-1
|
||||
```
|
||||
|
||||
Then, you can check the permissions by using the bus and device
|
||||
number reported above. Note that this pair is ephimeral and may
|
||||
number reported above. Note that this pair is ephemeral and may
|
||||
change after every device insertion:
|
||||
|
||||
```
|
||||
@ -137,54 +137,6 @@ If your available `objcopy` and `size` commands is anything other than
|
||||
the default `llvm-objcopy` and `llvm-size` define `OBJCOPY` and `SIZE`
|
||||
to whatever they're called on your system before calling `make`.
|
||||
|
||||
## Circuit board designs: KiCad 6.0
|
||||
|
||||
The circuit board designs were all created in [KiCad
|
||||
6.0](https://www.kicad.org/).
|
||||
|
||||
## MTA1-USB-V1 and TP-1 programming board firmware
|
||||
|
||||
The TP-1 programming boards runs a custom firmware developed by
|
||||
Blinkinlabs. Source code for this firmware can be found at
|
||||
[hw/boards/tp1/firmware/](../hw/boards/tp1/firmware/). There is also a
|
||||
pre-built firmware binary at
|
||||
[hw/boards/tp1/firmware/bin/main.uf2](../hw/boards/tp1/firmware/bin/main.uf2).
|
||||
|
||||
To update the firmware on the programmer board, either build the file
|
||||
`main.uf2` (more instructions below), or get the pre-built file to
|
||||
your host computer. Then do the following:
|
||||
|
||||
1. Disconnect the programming board from the host computer
|
||||
2. Press and hold the "BOOTSEL" button on the RPi2040 sub-board on the
|
||||
programming board
|
||||
3. Reconnect the programming board to the host computer
|
||||
4. Release the "BOOTSEL" button after connecting the programming board
|
||||
to the host. The board should now appear to the host as a USB
|
||||
connected storage device
|
||||
5. Open the storage device and drop the firmware file `main.uf2` into
|
||||
the storage device
|
||||
|
||||
The programmer will update its firmware with the file and restart
|
||||
itself. After reboot the storage device will automatically be
|
||||
disconnected.
|
||||
|
||||
### Building the TP-1 firmware
|
||||
|
||||
The firmware requires the Raspberry Pi Pico SDK:
|
||||
|
||||
cd ~
|
||||
git clone --branch 1.5.0 https://github.com/raspberrypi/pico-sdk.git
|
||||
cd pico-sdk
|
||||
git submodule update --init
|
||||
|
||||
Note that our container image places the pico-sdk directory in
|
||||
/usr/local. For normal development, it is usually left in the
|
||||
users home directory.
|
||||
|
||||
See
|
||||
[hw/boards/tp1/firmware/README.md](../hw/boards/tp1/firmware/README.md)
|
||||
for further instructions.
|
||||
|
||||
## CH552 USB to Serial firmware
|
||||
|
||||
The USB to Serial firmware runs on the CH552 microcontroller, and
|
||||
|
@ -1,27 +0,0 @@
|
||||
### TPCWare KiCad Library License
|
||||
|
||||
The TPCWare KiCad Library is licensed under the [Creative Commons CC-BY-SA 4.0 License](https://creativecommons.org/licenses/by-sa/4.0/legalcode), with the following exception:
|
||||
|
||||
---------
|
||||
|
||||
_To the extent that the creation of electronic designs that use 'Licensed Material' can be considered to be 'Adapted Material', then the copyright holder waives article 3 of the license with respect to these designs and any generated files which use data provided as part of the 'Licensed Material'._
|
||||
|
||||
---------
|
||||
|
||||
|
||||
**What does this mean?**
|
||||
|
||||
TPCWare KiCad Library is licensed in such a way to ensure free use of library data for commercial, closed, and non-commercial projects without restriction. TPCWare Corporation does not wish to exert any control over designs produced using the library data, or force users to reveal proprietary information contained in their designs. Neither do we wish to force users to attribute the TPCWare KiCad Library _within their design_.
|
||||
|
||||
Use of the library data in a project does not (by itself) require that the design or any files generated from the design are licensed under the CC-BY-SA 4.0 License. You are free to use the library data in your own projects without the obligation to share your project files under this or any other license agreement.
|
||||
|
||||
However, if you wish to redistribute the TPCWare KiCad Library, or parts thereof (including in modified form) as a collection then the exception above does not apply. Redistributed library collections must be shared under the same license agreement. Under these circumstances, the libraries must also retain attribution information, including the license documents which are distributed with the library files.
|
||||
|
||||
----------------------
|
||||
|
||||
|
||||
**Disclaimer of Warranties and Limitation of Liability.**
|
||||
|
||||
a. Unless otherwise separately undertaken by the Licensor, to the extent possible, the Licensor offers the Licensed Material as-is and as-available, and makes no representations or warranties of any kind concerning the Licensed Material, whether express, implied, statutory, or other. This includes, without limitation, warranties of title, merchantability, fitness for a particular purpose, non-infringement, absence of latent or other defects, accuracy, or the presence or absence of errors, whether or not known or discoverable. Where disclaimers of warranties are not allowed in full or in part, this disclaimer may not apply to You.
|
||||
b. To the extent possible, in no event will the Licensor be liable to You on any legal theory (including, without limitation, negligence) or otherwise for any direct, special, indirect, incidental, consequential, punitive, exemplary, or other losses, costs, expenses, or damages arising out of this Public License or use of the Licensed Material, even if the Licensor has been advised of the possibility of such losses, costs, expenses, or damages. Where a limitation of liability is not allowed in full or in part, this limitation may not apply to You.
|
||||
c. The disclaimer of warranties and limitation of liability provided above shall be interpreted in a manner that, to the extent possible, most closely approximates an absolute disclaimer and waiver of all liability.
|
@ -1,8 +0,0 @@
|
||||
# KiCad-RP-Pico
|
||||
A simple repository of files needed to add a 3D footprint of the Raspberry Pi Pico board to KiCad.
|
||||
|
||||
Adapted from https://github.com/ncarandini/KiCad-RP-Pico
|
||||
|
||||
## License
|
||||
Please read the [License](LICENSE) where is stated that this work is free to use.
|
||||
A tweet with an image of your Raspberry Pi Pico project with a link this project and me (@tpcware) would be greatly appreciated.
|
@ -1,201 +0,0 @@
|
||||
(kicad_symbol_lib (version 20211014) (generator kicad_symbol_editor)
|
||||
(symbol "Pico" (in_bom yes) (on_board yes)
|
||||
(property "Reference" "U" (id 0) (at -13.97 27.94 0)
|
||||
(effects (font (size 1.27 1.27)))
|
||||
)
|
||||
(property "Value" "Pico" (id 1) (at 0 19.05 0)
|
||||
(effects (font (size 1.27 1.27)))
|
||||
)
|
||||
(property "Footprint" "RPi_Pico:RPi_Pico_SMD_TH" (id 2) (at 0 0 90)
|
||||
(effects (font (size 1.27 1.27)) hide)
|
||||
)
|
||||
(property "Datasheet" "" (id 3) (at 0 0 0)
|
||||
(effects (font (size 1.27 1.27)) hide)
|
||||
)
|
||||
(symbol "Pico_0_0"
|
||||
(text "Raspberry Pi Pico" (at 0 21.59 0)
|
||||
(effects (font (size 1.27 1.27)))
|
||||
)
|
||||
)
|
||||
(symbol "Pico_0_1"
|
||||
(rectangle (start -15.24 26.67) (end 15.24 -26.67)
|
||||
(stroke (width 0) (type default) (color 0 0 0 0))
|
||||
(fill (type background))
|
||||
)
|
||||
)
|
||||
(symbol "Pico_1_1"
|
||||
(pin bidirectional line (at -17.78 24.13 0) (length 2.54)
|
||||
(name "GPIO0" (effects (font (size 1.27 1.27))))
|
||||
(number "1" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin bidirectional line (at -17.78 1.27 0) (length 2.54)
|
||||
(name "GPIO7" (effects (font (size 1.27 1.27))))
|
||||
(number "10" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin bidirectional line (at -17.78 -1.27 0) (length 2.54)
|
||||
(name "GPIO8" (effects (font (size 1.27 1.27))))
|
||||
(number "11" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin bidirectional line (at -17.78 -3.81 0) (length 2.54)
|
||||
(name "GPIO9" (effects (font (size 1.27 1.27))))
|
||||
(number "12" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin power_in line (at -17.78 -6.35 0) (length 2.54)
|
||||
(name "GND" (effects (font (size 1.27 1.27))))
|
||||
(number "13" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin bidirectional line (at -17.78 -8.89 0) (length 2.54)
|
||||
(name "GPIO10" (effects (font (size 1.27 1.27))))
|
||||
(number "14" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin bidirectional line (at -17.78 -11.43 0) (length 2.54)
|
||||
(name "GPIO11" (effects (font (size 1.27 1.27))))
|
||||
(number "15" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin bidirectional line (at -17.78 -13.97 0) (length 2.54)
|
||||
(name "GPIO12" (effects (font (size 1.27 1.27))))
|
||||
(number "16" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin bidirectional line (at -17.78 -16.51 0) (length 2.54)
|
||||
(name "GPIO13" (effects (font (size 1.27 1.27))))
|
||||
(number "17" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin power_in line (at -17.78 -19.05 0) (length 2.54)
|
||||
(name "GND" (effects (font (size 1.27 1.27))))
|
||||
(number "18" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin bidirectional line (at -17.78 -21.59 0) (length 2.54)
|
||||
(name "GPIO14" (effects (font (size 1.27 1.27))))
|
||||
(number "19" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin bidirectional line (at -17.78 21.59 0) (length 2.54)
|
||||
(name "GPIO1" (effects (font (size 1.27 1.27))))
|
||||
(number "2" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin bidirectional line (at -17.78 -24.13 0) (length 2.54)
|
||||
(name "GPIO15" (effects (font (size 1.27 1.27))))
|
||||
(number "20" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin bidirectional line (at 17.78 -24.13 180) (length 2.54)
|
||||
(name "GPIO16" (effects (font (size 1.27 1.27))))
|
||||
(number "21" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin bidirectional line (at 17.78 -21.59 180) (length 2.54)
|
||||
(name "GPIO17" (effects (font (size 1.27 1.27))))
|
||||
(number "22" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin power_in line (at 17.78 -19.05 180) (length 2.54)
|
||||
(name "GND" (effects (font (size 1.27 1.27))))
|
||||
(number "23" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin bidirectional line (at 17.78 -16.51 180) (length 2.54)
|
||||
(name "GPIO18" (effects (font (size 1.27 1.27))))
|
||||
(number "24" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin bidirectional line (at 17.78 -13.97 180) (length 2.54)
|
||||
(name "GPIO19" (effects (font (size 1.27 1.27))))
|
||||
(number "25" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin bidirectional line (at 17.78 -11.43 180) (length 2.54)
|
||||
(name "GPIO20" (effects (font (size 1.27 1.27))))
|
||||
(number "26" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin bidirectional line (at 17.78 -8.89 180) (length 2.54)
|
||||
(name "GPIO21" (effects (font (size 1.27 1.27))))
|
||||
(number "27" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin power_in line (at 17.78 -6.35 180) (length 2.54)
|
||||
(name "GND" (effects (font (size 1.27 1.27))))
|
||||
(number "28" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin bidirectional line (at 17.78 -3.81 180) (length 2.54)
|
||||
(name "GPIO22" (effects (font (size 1.27 1.27))))
|
||||
(number "29" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin power_in line (at -17.78 19.05 0) (length 2.54)
|
||||
(name "GND" (effects (font (size 1.27 1.27))))
|
||||
(number "3" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin input line (at 17.78 -1.27 180) (length 2.54)
|
||||
(name "RUN" (effects (font (size 1.27 1.27))))
|
||||
(number "30" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin bidirectional line (at 17.78 1.27 180) (length 2.54)
|
||||
(name "GPIO26_ADC0" (effects (font (size 1.27 1.27))))
|
||||
(number "31" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin bidirectional line (at 17.78 3.81 180) (length 2.54)
|
||||
(name "GPIO27_ADC1" (effects (font (size 1.27 1.27))))
|
||||
(number "32" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin power_in line (at 17.78 6.35 180) (length 2.54)
|
||||
(name "AGND" (effects (font (size 1.27 1.27))))
|
||||
(number "33" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin bidirectional line (at 17.78 8.89 180) (length 2.54)
|
||||
(name "GPIO28_ADC2" (effects (font (size 1.27 1.27))))
|
||||
(number "34" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin power_in line (at 17.78 11.43 180) (length 2.54)
|
||||
(name "ADC_VREF" (effects (font (size 1.27 1.27))))
|
||||
(number "35" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin power_in line (at 17.78 13.97 180) (length 2.54)
|
||||
(name "3V3" (effects (font (size 1.27 1.27))))
|
||||
(number "36" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin input line (at 17.78 16.51 180) (length 2.54)
|
||||
(name "3V3_EN" (effects (font (size 1.27 1.27))))
|
||||
(number "37" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin bidirectional line (at 17.78 19.05 180) (length 2.54)
|
||||
(name "GND" (effects (font (size 1.27 1.27))))
|
||||
(number "38" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin power_in line (at 17.78 21.59 180) (length 2.54)
|
||||
(name "VSYS" (effects (font (size 1.27 1.27))))
|
||||
(number "39" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin bidirectional line (at -17.78 16.51 0) (length 2.54)
|
||||
(name "GPIO2" (effects (font (size 1.27 1.27))))
|
||||
(number "4" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin power_in line (at 17.78 24.13 180) (length 2.54)
|
||||
(name "VBUS" (effects (font (size 1.27 1.27))))
|
||||
(number "40" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin input line (at -2.54 -29.21 90) (length 2.54)
|
||||
(name "SWCLK" (effects (font (size 1.27 1.27))))
|
||||
(number "41" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin power_in line (at 0 -29.21 90) (length 2.54)
|
||||
(name "GND" (effects (font (size 1.27 1.27))))
|
||||
(number "42" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin bidirectional line (at 2.54 -29.21 90) (length 2.54)
|
||||
(name "SWDIO" (effects (font (size 1.27 1.27))))
|
||||
(number "43" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin bidirectional line (at -17.78 13.97 0) (length 2.54)
|
||||
(name "GPIO3" (effects (font (size 1.27 1.27))))
|
||||
(number "5" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin bidirectional line (at -17.78 11.43 0) (length 2.54)
|
||||
(name "GPIO4" (effects (font (size 1.27 1.27))))
|
||||
(number "6" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin bidirectional line (at -17.78 8.89 0) (length 2.54)
|
||||
(name "GPIO5" (effects (font (size 1.27 1.27))))
|
||||
(number "7" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin power_in line (at -17.78 6.35 0) (length 2.54)
|
||||
(name "GND" (effects (font (size 1.27 1.27))))
|
||||
(number "8" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin bidirectional line (at -17.78 3.81 0) (length 2.54)
|
||||
(name "GPIO6" (effects (font (size 1.27 1.27))))
|
||||
(number "9" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
)
|
||||
)
|
||||
)
|
@ -1,153 +0,0 @@
|
||||
(footprint "RPi_Pico_SMD" (version 20211014) (generator pcbnew)
|
||||
(layer "F.Cu")
|
||||
(tedit 6224DF39)
|
||||
(descr "Through hole straight pin header, 2x20, 2.54mm pitch, double rows")
|
||||
(tags "Through hole pin header THT 2x20 2.54mm double row")
|
||||
(attr through_hole)
|
||||
(fp_text reference "REF**" (at 0 0) (layer "F.SilkS")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp 96315415-cfed-47d2-b3dd-d782358bd0df)
|
||||
)
|
||||
(fp_text value "RPi_Pico_SMD" (at 0 2.159) (layer "F.Fab")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp 46cbe85d-ff47-428e-b187-4ebd50a66e0c)
|
||||
)
|
||||
(fp_text user "Copper Keepouts shown on Dwgs layer" (at 0.1 -30.2) (layer "Cmts.User")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp 66ca01b3-51ff-4294-9b77-4492e98f6aec)
|
||||
)
|
||||
(fp_text user "${REFERENCE}" (at 0 0 180) (layer "F.Fab")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
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|
||||
(pad "18" smd rect (at -8.89 19.05) (size 3.5 1.7) (drill (offset -0.9 0)) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 91fc5800-6029-46b1-848d-ca0091f97267))
|
||||
(pad "19" smd rect (at -8.89 21.59) (size 3.5 1.7) (drill (offset -0.9 0)) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 275b6416-db29-42cc-9307-bf426917c3b4))
|
||||
(pad "20" smd rect (at -8.89 24.13) (size 3.5 1.7) (drill (offset -0.9 0)) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 3c22d605-7855-4cc6-8ad2-906cadbd02dc))
|
||||
(pad "21" smd rect (at 8.89 24.13) (size 3.5 1.7) (drill (offset 0.9 0)) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 24adc223-60f0-4497-98a3-d664c5a13280))
|
||||
(pad "22" smd rect (at 8.89 21.59) (size 3.5 1.7) (drill (offset 0.9 0)) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 13ac70df-e9b9-44e5-96e6-20f0b0dc6a3a))
|
||||
(pad "23" smd rect (at 8.89 19.05) (size 3.5 1.7) (drill (offset 0.9 0)) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 278a91dc-d57d-4a5c-a045-34b6bd84131f))
|
||||
(pad "24" smd rect (at 8.89 16.51) (size 3.5 1.7) (drill (offset 0.9 0)) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 98966de3-2364-43d8-a2e0-b03bb9487b03))
|
||||
(pad "25" smd rect (at 8.89 13.97) (size 3.5 1.7) (drill (offset 0.9 0)) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 4cc0e615-05a0-4f42-a208-4011ba8ef841))
|
||||
(pad "26" smd rect (at 8.89 11.43) (size 3.5 1.7) (drill (offset 0.9 0)) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 4641c87c-bffa-41fe-ae77-be3a97a6f797))
|
||||
(pad "27" smd rect (at 8.89 8.89) (size 3.5 1.7) (drill (offset 0.9 0)) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp da546d77-4b03-4562-8fc6-837fd68e7691))
|
||||
(pad "28" smd rect (at 8.89 6.35) (size 3.5 1.7) (drill (offset 0.9 0)) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp e2fac877-439c-4da0-af2e-5fdc70f85d42))
|
||||
(pad "29" smd rect (at 8.89 3.81) (size 3.5 1.7) (drill (offset 0.9 0)) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 2ea8fa6f-efc3-40fe-bcf9-05bfa46ead4f))
|
||||
(pad "30" smd rect (at 8.89 1.27) (size 3.5 1.7) (drill (offset 0.9 0)) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 9da1ace0-4181-4f12-80f8-16786a9e5c07))
|
||||
(pad "31" smd rect (at 8.89 -1.27) (size 3.5 1.7) (drill (offset 0.9 0)) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 29126f72-63f7-4275-8b12-6b96a71c6f17))
|
||||
(pad "32" smd rect (at 8.89 -3.81) (size 3.5 1.7) (drill (offset 0.9 0)) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp af186015-d283-4209-aade-a247e5de01df))
|
||||
(pad "33" smd rect (at 8.89 -6.35) (size 3.5 1.7) (drill (offset 0.9 0)) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 8d063f79-9282-4820-bcf4-1ff3c006cf08))
|
||||
(pad "34" smd rect (at 8.89 -8.89) (size 3.5 1.7) (drill (offset 0.9 0)) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 0554bea0-89b2-4e25-9ea3-4c73921c94cb))
|
||||
(pad "35" smd rect (at 8.89 -11.43) (size 3.5 1.7) (drill (offset 0.9 0)) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 88606262-3ac5-44a1-aacc-18b26cf4d396))
|
||||
(pad "36" smd rect (at 8.89 -13.97) (size 3.5 1.7) (drill (offset 0.9 0)) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp cd1cff81-9d8a-4511-96d6-4ddb79484001))
|
||||
(pad "37" smd rect (at 8.89 -16.51) (size 3.5 1.7) (drill (offset 0.9 0)) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 22962957-1efd-404d-83db-5b233b6c15b0))
|
||||
(pad "38" smd rect (at 8.89 -19.05) (size 3.5 1.7) (drill (offset 0.9 0)) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 8eb98c56-17e4-4de6-a3e3-06dcfa392040))
|
||||
(pad "39" smd rect (at 8.89 -21.59) (size 3.5 1.7) (drill (offset 0.9 0)) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp c66a19ed-90c0-4502-ae75-6a4c4ab9f297))
|
||||
(pad "40" smd rect (at 8.89 -24.13) (size 3.5 1.7) (drill (offset 0.9 0)) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp bd085057-7c0e-463a-982b-968a2dc1f0f8))
|
||||
(pad "41" smd rect (at -2.54 23.9 90) (size 3.5 1.7) (drill (offset -0.9 0)) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp b21299b9-3c4d-43df-b399-7f9b08eb5470))
|
||||
(pad "42" smd rect (at 0 23.9 90) (size 3.5 1.7) (drill (offset -0.9 0)) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 751d823e-1d7b-4501-9658-d06d459b0e16))
|
||||
(pad "43" smd rect (at 2.54 23.9 90) (size 3.5 1.7) (drill (offset -0.9 0)) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp aadc3df5-0e2d-4f3d-b72e-6f184da74c89))
|
||||
(model "${KIPRJMOD}/../KiCad-RP Pico/RP-Pico-Libraries/Pico.wrl"
|
||||
(offset (xyz 0 0 0))
|
||||
(scale (xyz 1 1 1))
|
||||
(rotate (xyz 0 0 0))
|
||||
)
|
||||
)
|
File diff suppressed because it is too large
Load Diff
@ -1,34 +0,0 @@
|
||||
(kicad_wks (version 20210606) (generator pl_editor)
|
||||
(setup (textsize 1.5 1.5)(linewidth 0.15)(textlinewidth 0.15)
|
||||
(left_margin 10)(right_margin 10)(top_margin 10)(bottom_margin 10))
|
||||
(rect (name "") (start 110 60) (end 2 2) (comment "rect around the title block")
|
||||
)
|
||||
(rect (name "") (start 0 0 ltcorner) (end 0 0) (repeat 2) (incrx 2) (incry 2))
|
||||
(line (name "") (start 50 2 ltcorner) (end 50 0 ltcorner) (repeat 30) (incrx 50))
|
||||
(tbtext "1" (name "") (pos 25 1 ltcorner) (font (size 1.3 1.3)) (repeat 100) (incrx 50))
|
||||
(line (name "") (start 50 2 lbcorner) (end 50 0 lbcorner) (repeat 30) (incrx 50))
|
||||
(tbtext "1" (name "") (pos 25 1 lbcorner) (font (size 1.3 1.3)) (repeat 100) (incrx 50))
|
||||
(line (name "") (start 0 50 ltcorner) (end 2 50 ltcorner) (repeat 30) (incry 50))
|
||||
(tbtext "A" (name "") (pos 1 25 ltcorner) (font (size 1.3 1.3)) (justify center) (repeat 100) (incry 50))
|
||||
(line (name "") (start 0 50 rtcorner) (end 2 50 rtcorner) (repeat 30) (incry 50))
|
||||
(tbtext "A" (name "") (pos 1 25 rtcorner) (font (size 1.3 1.3)) (justify center) (repeat 100) (incry 50))
|
||||
(tbtext "Date: ${ISSUE_DATE}" (name "") (pos 87 6.9))
|
||||
(line (name "") (start 110 5.5) (end 2 5.5))
|
||||
(tbtext "${KICAD_VERSION}" (name "") (pos 109 4.1) (comment "Kicad version")
|
||||
)
|
||||
(line (name "") (start 110 8.5) (end 2 8.5))
|
||||
(tbtext "Rev: ${REVISION}" (name "") (pos 24 6.9) (font bold))
|
||||
(tbtext "Size: ${PAPER}" (name "") (pos 109 6.9) (comment "Paper format name")
|
||||
)
|
||||
(tbtext "Id: ${#}/${##}" (name "") (pos 24 4.1) (comment "Sheet id")
|
||||
)
|
||||
(line (name "") (start 110 12.5) (end 2 12.5))
|
||||
(tbtext "Title: ${TITLE}" (name "") (pos 109 10.7) (font (size 2 2) bold italic))
|
||||
(tbtext "File: ${FILENAME}" (name "") (pos 109 14.3))
|
||||
(line (name "") (start 110 18.5) (end 2 18.5))
|
||||
(tbtext "Sheet: ${SHEETNAME}" (name "") (pos 109 17))
|
||||
(line (name "") (start 90 8.5) (end 90 5.5))
|
||||
(line (name "") (start 26 8.5) (end 26 2))
|
||||
(tbtext "This document describes Open Hardware and is licensed under the CERN-OHL-S v2.\n\nYou may redistribute and modify this source and make products using it under\nthe terms of the CERN-OHL-S v2 (https://ohwr.org/cern_ohl_s_v2.txt).\n\nThis source is distributed WITHOUT ANY EXPRESS OR IMPLIED WARRANTY, INCLUDING\nOF MERCHANTABILITY, SATISFACTORY QUALITY AND FITNESS FOR A PARTICULAR PURPOSE.\nPlease see the CERN-OHL-S v2 for applicable conditions." (name "") (pos 107.729 33.0022))
|
||||
(tbtext "Copyright ${COMPANY} ${COMMENT1}" (name "") (pos 107.729 53.3222) (font (size 2.5 2.5) bold))
|
||||
)
|
@ -1,113 +0,0 @@
|
||||
#
|
||||
# Example python script to generate a BOM from a KiCad generic netlist
|
||||
#
|
||||
# Example: Sorted and Grouped CSV BOM
|
||||
#
|
||||
|
||||
"""
|
||||
@package
|
||||
Output: CSV (comma-separated)
|
||||
Grouped By: Value, Extended Value, Footprint
|
||||
Sorted By: Ref
|
||||
Fields: Ref, Qnty, Value, Footprint, Description, Manufacturer, Manufacturer Part Number
|
||||
|
||||
Command line:
|
||||
python "pathToFile/bom_csv_grouped_by_extended_value.py" "%I" "%O.csv"
|
||||
"""
|
||||
|
||||
# Import the KiCad python helper module and the csv formatter
|
||||
import kicad_netlist_reader
|
||||
import kicad_utils
|
||||
import csv
|
||||
import sys
|
||||
|
||||
# A helper function to convert a UTF8/Unicode/locale string read in netlist
|
||||
# for python2 or python3
|
||||
def fromNetlistText( aText ):
|
||||
if sys.platform.startswith('win32'):
|
||||
try:
|
||||
return aText.encode('utf-8').decode('cp1252')
|
||||
except UnicodeDecodeError:
|
||||
return aText
|
||||
else:
|
||||
return aText
|
||||
|
||||
# Group components if their value, extended value, footprint, and reference designator type (?) are the same
|
||||
import string
|
||||
def equate_value_extended_value_footprint(self, other):
|
||||
""" Equivalency operator, remember this can be easily overloaded
|
||||
2 components are equivalent ( i.e. can be grouped
|
||||
if they have same value and same footprint
|
||||
|
||||
Override the component equivalence operator must be done before
|
||||
loading the netlist, otherwise all components will have the original
|
||||
equivalency operator.
|
||||
|
||||
You have to define a comparison module (for instance named myEqu)
|
||||
and add the line;
|
||||
kicad_netlist_reader.comp.__eq__ = myEqu
|
||||
in your bom generator script before calling the netliste reader by something like:
|
||||
net = kicad_netlist_reader.netlist(sys.argv[1])
|
||||
"""
|
||||
result = False
|
||||
if self.getValue() == other.getValue():
|
||||
if self.getField("Extended Value") == other.getField("Extended Value"):
|
||||
if self.getFootprint() == other.getFootprint():
|
||||
if self.getRef().rstrip(string.digits) == other.getRef().rstrip(string.digits):
|
||||
result = True
|
||||
return result
|
||||
|
||||
kicad_netlist_reader.comp.__eq__ = equate_value_extended_value_footprint
|
||||
|
||||
# Generate an instance of a generic netlist, and load the netlist tree from
|
||||
# the command line option. If the file doesn't exist, execution will stop
|
||||
net = kicad_netlist_reader.netlist(sys.argv[1])
|
||||
|
||||
# Open a file to write to, if the file cannot be opened output to stdout
|
||||
# instead
|
||||
try:
|
||||
f = kicad_utils.open_file_write(sys.argv[2], 'w')
|
||||
except IOError:
|
||||
e = "Can't open output file for writing: " + sys.argv[2]
|
||||
print(__file__, ":", e, sys.stderr)
|
||||
f = sys.stdout
|
||||
|
||||
# Create a new csv writer object to use as the output formatter
|
||||
out = csv.writer(f, delimiter=',', lineterminator='\n', quotechar='\"', quoting=csv.QUOTE_ALL)
|
||||
|
||||
# Output a set of rows for a header providing general information
|
||||
out.writerow(['Source:', net.getSource()])
|
||||
out.writerow(['Date:', net.getDate()])
|
||||
out.writerow(['Tool:', net.getTool()])
|
||||
out.writerow( ['Generator:', sys.argv[0]] )
|
||||
out.writerow(['Component Count:', len(net.components)])
|
||||
out.writerow(['Ref', 'Qnty', 'Value', 'Footprint', 'Description', 'Manufacturer', 'Manufacturer Part Number', 'Supplier', 'Supplier Part Number'])
|
||||
|
||||
|
||||
# Get all of the components in groups of matching parts + values
|
||||
# (see ky_generic_netlist_reader.py)
|
||||
grouped = net.groupComponents()
|
||||
|
||||
# Output all of the component information
|
||||
for group in grouped:
|
||||
refs = ','.join([fromNetlistText( component.getRef() ) for component in group])
|
||||
c = group[-1]
|
||||
|
||||
combinedvalue = c.getValue()
|
||||
if c.getField("Extended Value") != '':
|
||||
combinedvalue += ',' + c.getField("Extended Value")
|
||||
|
||||
# Fill in the component groups common data
|
||||
out.writerow([
|
||||
refs,
|
||||
len(group),
|
||||
combinedvalue,
|
||||
fromNetlistText( c.getFootprint() ),
|
||||
fromNetlistText( c.getDescription() ),
|
||||
fromNetlistText( c.getField("Manufacturer") ),
|
||||
fromNetlistText( c.getField("Manufacturer Part Number") ),
|
||||
fromNetlistText( c.getField("Supplier") ),
|
||||
fromNetlistText( c.getField("Supplier Part Number") )
|
||||
])
|
||||
|
||||
|
@ -1,15 +0,0 @@
|
||||
EESchema-DOCLIB Version 2.0
|
||||
#
|
||||
$CMP ICE40UP5K-SG48ITR
|
||||
D iCE40 UltraPlus FPGA, 5280 LUTs, 1.2V, 48-pin QFN
|
||||
K FPGA programmable logic
|
||||
F http://www.latticesemi.com/Products/FPGAandCPLD/iCE40Ultra
|
||||
$ENDCMP
|
||||
#
|
||||
$CMP W25Q80DVSNIG
|
||||
D 32Mb Serial Flash Memory, Standard/Dual/Quad SPI, SOIC-8
|
||||
K flash memory SPI
|
||||
F https://www.winbond.com/resource-files/w25q80dv_revg_07212015.pdf
|
||||
$ENDCMP
|
||||
#
|
||||
#End Doc Library
|
File diff suppressed because it is too large
Load Diff
@ -1,61 +0,0 @@
|
||||
(footprint "0402rgb-1010" (version 20211014) (generator pcbnew)
|
||||
(layer "F.Cu")
|
||||
(tedit 616EE650)
|
||||
(attr smd)
|
||||
(fp_text reference "D" (at 0 0) (layer "F.Fab")
|
||||
(effects (font (size 0.5 0.5) (thickness 0.075)))
|
||||
(tstamp 6eaf44a5-2bb8-4e84-ae85-e082a57042dd)
|
||||
)
|
||||
(fp_text value "0402rgb-1010" (at 0.0635 -1.54178) (layer "F.Fab")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp 4e647fa9-4baf-493a-891e-373b7bb90db1)
|
||||
)
|
||||
(fp_poly (pts
|
||||
(xy -0.6096 -0.60198)
|
||||
(xy -0.29972 -0.60198)
|
||||
(xy -0.29972 -0.25146)
|
||||
(xy -0.6096 -0.25146)
|
||||
(xy -0.6096 -0.45212)
|
||||
) (layer "F.Paste") (width 0.01) (fill solid) (tstamp 8cd8d6bd-0601-49fc-9009-a437af9b27c1))
|
||||
(fp_poly (pts
|
||||
(xy 0.2921 0.25146)
|
||||
(xy 0.60198 0.25146)
|
||||
(xy 0.60198 0.60198)
|
||||
(xy 0.2921 0.60198)
|
||||
(xy 0.2921 0.40132)
|
||||
) (layer "F.Paste") (width 0.01) (fill solid) (tstamp c0eb397c-0f0a-48f2-a4a7-a39c38857565))
|
||||
(fp_poly (pts
|
||||
(xy 0.28956 -0.60198)
|
||||
(xy 0.59944 -0.60198)
|
||||
(xy 0.59944 -0.25146)
|
||||
(xy 0.28956 -0.25146)
|
||||
(xy 0.28956 -0.45212)
|
||||
) (layer "F.Paste") (width 0.01) (fill solid) (tstamp f157df02-fcb0-4ae7-85ca-bfc4444eda90))
|
||||
(fp_poly (pts
|
||||
(xy -0.60198 0.24892)
|
||||
(xy -0.2921 0.24892)
|
||||
(xy -0.2921 0.59944)
|
||||
(xy -0.60198 0.59944)
|
||||
(xy -0.60198 0.39878)
|
||||
) (layer "F.Paste") (width 0.01) (fill solid) (tstamp f3dab665-64fc-433e-8a62-3743b891ab83))
|
||||
(fp_line (start 0.6477 0.4191) (end 0.6477 0.65278) (layer "F.SilkS") (width 0.05) (tstamp 4ea989fb-9cda-4210-89d1-fe153727e40c))
|
||||
(fp_line (start 0.6477 0.65278) (end 0.44704 0.65278) (layer "F.SilkS") (width 0.05) (tstamp f64aa569-ea55-4736-9c96-3bfc2b30ccbd))
|
||||
(fp_line (start -0.8 -0.8) (end 0.8 -0.8) (layer "F.CrtYd") (width 0.05) (tstamp 05e65b06-4a6d-49f9-a6e8-c5bc53ef3e2a))
|
||||
(fp_line (start -0.8 0.8) (end 0.8 0.8) (layer "F.CrtYd") (width 0.05) (tstamp 39156b1c-bf91-438d-afb8-2007458c0b8e))
|
||||
(fp_line (start 0.8 0.8) (end 0.8 -0.8) (layer "F.CrtYd") (width 0.05) (tstamp 914c5b3a-21b5-462d-8f55-ca0b3cc81d2e))
|
||||
(fp_line (start -0.8 0.8) (end -0.8 -0.8) (layer "F.CrtYd") (width 0.05) (tstamp dd287ecc-48c7-4569-84ef-5639ce72358e))
|
||||
(fp_line (start -0.6 0.6) (end -0.6 -0.6) (layer "F.Fab") (width 0.1) (tstamp 08f7614b-9649-49c1-b63a-65c3d0a1ef41))
|
||||
(fp_line (start 0.3 0.6) (end -0.6 0.6) (layer "F.Fab") (width 0.1) (tstamp 27c16a37-d65b-4a83-af1a-5ee1a87062f4))
|
||||
(fp_line (start 0.3 0.6) (end 0.6 0.3) (layer "F.Fab") (width 0.1) (tstamp 4b62363e-5fde-40c0-ad96-ceb955d367f5))
|
||||
(fp_line (start 0.6 -0.6) (end 0.6 0.3) (layer "F.Fab") (width 0.1) (tstamp 77068506-5e69-47f6-8c18-559ed07a8a9f))
|
||||
(fp_line (start -0.6 -0.6) (end 0.6 -0.6) (layer "F.Fab") (width 0.1) (tstamp 9d536585-2f1d-4551-af3b-a0a4a6fa8aee))
|
||||
(pad "1" smd rect (at 0.38 0.38) (size 0.45 0.45) (layers "F.Cu" "F.Mask") (tstamp 1d4ec9d6-b4f1-4935-a655-c469bc01feb9))
|
||||
(pad "2" smd rect (at -0.38 0.38) (size 0.45 0.45) (layers "F.Cu" "F.Mask") (tstamp 62faf466-a5e1-4997-954a-e3f3f47e0a99))
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|
||||
#513=FILL_AREA_STYLE('Steel - Satin',(#516));
|
||||
#514=FILL_AREA_STYLE('Steel - Satin',(#517));
|
||||
#515=FILL_AREA_STYLE('Lead - Satin',(#518));
|
||||
#516=FILL_AREA_STYLE_COLOUR('Steel - Satin',#519);
|
||||
#517=FILL_AREA_STYLE_COLOUR('Steel - Satin',#520);
|
||||
#518=FILL_AREA_STYLE_COLOUR('Lead - Satin',#521);
|
||||
#519=COLOUR_RGB('Steel - Satin',0.627450980392157,0.627450980392157,0.627450980392157);
|
||||
#520=COLOUR_RGB('Steel - Satin',0.47843137254902,0.392156862745098,0.266666666666667);
|
||||
#521=COLOUR_RGB('Lead - Satin',0.815686274509804,0.815686274509804,0.815686274509804);
|
||||
ENDSEC;
|
||||
END-ISO-10303-21;
|
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Load Diff
@ -1,40 +0,0 @@
|
||||
(footprint "AP22802AW5-SOT-23-5" (version 20211014) (generator pcbnew)
|
||||
(layer "F.Cu")
|
||||
(tedit 61367F51)
|
||||
(descr "5-pin SOT23 package")
|
||||
(tags "SOT-23-5")
|
||||
(attr smd)
|
||||
(fp_text reference "REF**" (at 0 -2.9) (layer "F.SilkS")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
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|
||||
)
|
||||
(fp_text value "AP22802AW5-SOT-23-5" (at 0 2.9) (layer "F.Fab")
|
||||
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|
||||
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|
||||
)
|
||||
(fp_text user "${REFERENCE}" (at 0 0 90) (layer "F.Fab")
|
||||
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||||
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|
||||
)
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
(fp_line (start -1.9 1.8) (end -1.9 -1.8) (layer "F.CrtYd") (width 0.05) (tstamp ec654617-65dd-4207-b324-b0895176aa59))
|
||||
(fp_line (start -0.9 -0.9) (end -0.9 1.55) (layer "F.Fab") (width 0.1) (tstamp 5dca725c-29fd-4b5b-b012-830ab59914be))
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||||
(fp_line (start 0.9 1.55) (end -0.9 1.55) (layer "F.Fab") (width 0.1) (tstamp a7f6f29a-97ab-47b4-980c-45f4600fdb97))
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||||
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|
||||
(fp_line (start 0.9 -1.55) (end 0.9 1.55) (layer "F.Fab") (width 0.1) (tstamp e9de2be6-f93f-4f60-8594-4ad9f53236a3))
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||||
(fp_line (start 0.9 -1.55) (end -0.25 -1.55) (layer "F.Fab") (width 0.1) (tstamp f9d3815d-7f06-438b-a7cd-6a32a2763be6))
|
||||
(pad "1" smd rect (at -1.1 -0.95) (size 1.06 0.65) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 3943437c-7fcb-4be3-88eb-7e08b4c71093))
|
||||
(pad "2" smd rect (at -1.1 0) (size 1.06 0.65) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp b4008af9-04d0-41c9-9c35-f8b44c33ac9a))
|
||||
(pad "3" smd rect (at -1.1 0.95) (size 1.06 0.65) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 81d091a7-dd43-4108-9bad-91f21605e2a9))
|
||||
(pad "4" smd rect (at 1.1 0.95) (size 1.06 0.65) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 739d36b6-b48c-40ae-a97e-78e0165cc69e))
|
||||
(pad "5" smd rect (at 1.1 -0.95) (size 1.06 0.65) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp d6093aa1-0151-4029-bd11-4474df94de39))
|
||||
(model "${KIPRJMOD}/../mta1-library/mta1.pretty/3d_models/AP22802AW5-SOT23-5-MARKS XA7sE.step"
|
||||
(offset (xyz 0 0 0))
|
||||
(scale (xyz 1 1 1))
|
||||
(rotate (xyz -90 0 -90))
|
||||
)
|
||||
)
|
@ -1,35 +0,0 @@
|
||||
(footprint "BC-1-208" (version 20211014) (generator pcbnew)
|
||||
(layer "F.Cu")
|
||||
(tedit 0)
|
||||
(attr smd)
|
||||
(fp_text reference "REF**" (at 0 -3.5 unlocked) (layer "F.SilkS")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp 1d6c2d6c-bee0-401d-9749-98f17833afdd)
|
||||
)
|
||||
(fp_text value "BC-1-208" (at 0 3.5 unlocked) (layer "F.Fab")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp e6235600-87cc-4c82-b15f-34fb66b9bf0e)
|
||||
)
|
||||
(fp_text user "${REFERENCE}" (at 0 0 unlocked) (layer "F.Fab")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
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||||
(tstamp e73ef891-c9f9-42ab-894b-b2580ee0b0a1)
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||||
)
|
||||
(fp_line (start -3 2) (end -3 -2) (layer "F.SilkS") (width 0.12) (tstamp 36915340-9dd2-4d10-bb2e-946e32cc121b))
|
||||
(fp_line (start 3 2) (end -3 2) (layer "F.SilkS") (width 0.12) (tstamp a82cec30-45c1-49b3-b9e6-e30cc49eb759))
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||||
(fp_line (start -3 -2) (end 3 -2) (layer "F.SilkS") (width 0.12) (tstamp d789eb5c-7750-4e88-bd51-088f1d8d4899))
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||||
(fp_line (start -3.5 2.5) (end 3.5 2.5) (layer "F.CrtYd") (width 0.05) (tstamp 0f5e332d-aeaa-4ead-958c-993a39728c19))
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||||
(fp_line (start -3.5 2.5) (end -3.5 -2.5) (layer "F.CrtYd") (width 0.05) (tstamp 135e3642-358a-4af8-829a-e9d8d5db6f15))
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||||
(fp_line (start -3.5 -2.5) (end 3.5 -2.5) (layer "F.CrtYd") (width 0.05) (tstamp 88f2c5d0-ef3f-49a8-aa6f-586a595bc1a1))
|
||||
(fp_line (start 3.5 2.5) (end 3.5 -2.5) (layer "F.CrtYd") (width 0.05) (tstamp f1b1c833-6823-43af-b40b-5bbeb1279d5f))
|
||||
(fp_line (start -3 -2) (end 3 -2) (layer "F.Fab") (width 0.12) (tstamp 0296348c-6154-453d-af9d-d51660eedb2e))
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||||
(fp_line (start -3 2) (end 3 2) (layer "F.Fab") (width 0.12) (tstamp 19eafe4f-9cdc-4308-bf19-b5a244375fe4))
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||||
(fp_line (start -3 2) (end -3 -2) (layer "F.Fab") (width 0.12) (tstamp 7e208309-0c8f-45b4-9a38-d075f2b0288a))
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||||
(fp_line (start 3 2) (end 3 -2) (layer "F.Fab") (width 0.12) (tstamp cec35c34-9ef5-4206-9cad-73650f9c0c6e))
|
||||
(pad "1" smd roundrect (at 2 -1) (size 2.6 1.7) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.1) (tstamp e0795232-a4f5-40af-bd8a-4a69f1a39aa6))
|
||||
(pad "2" smd roundrect (at 2 1) (size 2.6 1.7) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.1) (tstamp e60f5c1d-c97e-4327-8023-b78c1d20bdfb))
|
||||
(model "../mta1-library/mta1.pretty/3d_models/BC-1-208.step"
|
||||
(offset (xyz 0 5 0))
|
||||
(scale (xyz 1 1 1))
|
||||
(rotate (xyz -90 0 -90))
|
||||
)
|
||||
)
|
@ -1,40 +0,0 @@
|
||||
(footprint "BC-1-701" (version 20211014) (generator pcbnew)
|
||||
(layer "F.Cu")
|
||||
(tedit 0)
|
||||
(attr smd)
|
||||
(fp_text reference "REF**" (at 0 -8.5 unlocked) (layer "F.SilkS")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp 1d6c2d6c-bee0-401d-9749-98f17833afdd)
|
||||
)
|
||||
(fp_text value "BC-1-701" (at 0 9 unlocked) (layer "F.Fab")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp e6235600-87cc-4c82-b15f-34fb66b9bf0e)
|
||||
)
|
||||
(fp_text user "${REFERENCE}" (at 0 0 unlocked) (layer "F.Fab")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp e73ef891-c9f9-42ab-894b-b2580ee0b0a1)
|
||||
)
|
||||
(fp_line (start -3 7) (end -3 -7) (layer "F.SilkS") (width 0.12) (tstamp 36915340-9dd2-4d10-bb2e-946e32cc121b))
|
||||
(fp_line (start 3 7) (end -3 7) (layer "F.SilkS") (width 0.12) (tstamp a82cec30-45c1-49b3-b9e6-e30cc49eb759))
|
||||
(fp_line (start -3 -7) (end 3 -7) (layer "F.SilkS") (width 0.12) (tstamp d789eb5c-7750-4e88-bd51-088f1d8d4899))
|
||||
(fp_line (start -3.5 7.5) (end 3.5 7.5) (layer "F.CrtYd") (width 0.05) (tstamp 0f5e332d-aeaa-4ead-958c-993a39728c19))
|
||||
(fp_line (start -3.5 7.5) (end -3.5 -7.5) (layer "F.CrtYd") (width 0.05) (tstamp 135e3642-358a-4af8-829a-e9d8d5db6f15))
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||||
(fp_line (start -3.5 -7.5) (end 3.5 -7.5) (layer "F.CrtYd") (width 0.05) (tstamp 88f2c5d0-ef3f-49a8-aa6f-586a595bc1a1))
|
||||
(fp_line (start 3.5 7.5) (end 3.5 -7.5) (layer "F.CrtYd") (width 0.05) (tstamp f1b1c833-6823-43af-b40b-5bbeb1279d5f))
|
||||
(fp_line (start 3 7) (end 3 -7) (layer "F.Fab") (width 0.12) (tstamp 11d2d201-bc39-4860-b7b8-2ea43340be97))
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||||
(fp_line (start -3 7) (end -3 -7) (layer "F.Fab") (width 0.12) (tstamp 19a5b698-5dc9-4ea2-9d80-f7f9cbd292c9))
|
||||
(fp_line (start -3 7) (end 3 7) (layer "F.Fab") (width 0.12) (tstamp 3e39adc1-9b06-431d-9446-ca8e37f3ccd9))
|
||||
(fp_line (start -3 -7) (end 3 -7) (layer "F.Fab") (width 0.12) (tstamp 9ed29860-ed5a-408f-8820-1ab6b7a9a7c3))
|
||||
(pad "1" smd roundrect (at 2 -6) (size 2.6 1.7) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.1) (tstamp e0795232-a4f5-40af-bd8a-4a69f1a39aa6))
|
||||
(pad "2" smd roundrect (at 2 -4) (size 2.6 1.7) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.1) (tstamp e60f5c1d-c97e-4327-8023-b78c1d20bdfb))
|
||||
(pad "3" smd roundrect (at 2 -2) (size 2.6 1.7) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.1) (tstamp 6dead470-a003-4d9a-a776-ac69dd42634c))
|
||||
(pad "4" smd roundrect (at 2 0) (size 2.6 1.7) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.1) (tstamp 691faf73-5aa1-4ed9-9a31-9b56032bfa62))
|
||||
(pad "5" smd roundrect (at 2 2) (size 2.6 1.7) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.1) (tstamp 54a3c92d-a091-405f-b445-603c0f2e1fb3))
|
||||
(pad "6" smd roundrect (at 2 4) (size 2.6 1.7) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.1) (tstamp 02a08a24-751b-4ad4-b6b1-621603af88cc))
|
||||
(pad "7" smd roundrect (at 2 6) (size 2.6 1.7) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.1) (tstamp 5d68a8ff-55d9-4830-83f9-f4b7757ac472))
|
||||
(model "../mta1-library/mta1.pretty/3d_models/BC-1-701.step"
|
||||
(offset (xyz 0 0 0))
|
||||
(scale (xyz 1 1 1))
|
||||
(rotate (xyz -90 0 -90))
|
||||
)
|
||||
)
|
@ -1,31 +0,0 @@
|
||||
(module CAPC1005X06L (layer F.Cu) (tedit 6137303B)
|
||||
(descr "Capacitor SMD 0402 (1005 Metric), square (rectangular) end terminal, IPC_7351 least")
|
||||
(tags capacitor)
|
||||
(attr smd)
|
||||
(fp_text reference REF** (at 0 -1.16) (layer F.SilkS)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_text value CAPC1005X06L (at 0 1.16) (layer F.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_line (start 0.91 0.46) (end -0.91 0.46) (layer F.CrtYd) (width 0.05))
|
||||
(fp_line (start 0.91 -0.46) (end 0.91 0.46) (layer F.CrtYd) (width 0.05))
|
||||
(fp_line (start -0.91 -0.46) (end 0.91 -0.46) (layer F.CrtYd) (width 0.05))
|
||||
(fp_line (start -0.91 0.46) (end -0.91 -0.46) (layer F.CrtYd) (width 0.05))
|
||||
(fp_line (start -0.107836 0.36) (end 0.107836 0.36) (layer F.SilkS) (width 0.12))
|
||||
(fp_line (start -0.107836 -0.36) (end 0.107836 -0.36) (layer F.SilkS) (width 0.12))
|
||||
(fp_line (start 0.5 0.25) (end -0.5 0.25) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start 0.5 -0.25) (end 0.5 0.25) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start -0.5 -0.25) (end 0.5 -0.25) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start -0.5 0.25) (end -0.5 -0.25) (layer F.Fab) (width 0.1))
|
||||
(fp_text user %R (at 0 0) (layer F.Fab)
|
||||
(effects (font (size 0.25 0.25) (thickness 0.04)))
|
||||
)
|
||||
(pad 1 smd roundrect (at -0.39 0) (size 0.56 0.518) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 2 smd roundrect (at 0.39 0) (size 0.56 0.518) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
|
||||
(model ${KICAD6_3DMODEL_DIR}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
|
||||
(at (xyz 0 0 0))
|
||||
(scale (xyz 1 1 1))
|
||||
(rotate (xyz 0 0 0))
|
||||
)
|
||||
)
|
@ -1,31 +0,0 @@
|
||||
(module CAPC1608X09L (layer F.Cu) (tedit 61373115)
|
||||
(descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 least")
|
||||
(tags capacitor)
|
||||
(attr smd)
|
||||
(fp_text reference REF** (at 0 -1.43) (layer F.SilkS)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_text value CAPC1608X09L (at 0 1.43) (layer F.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start -0.14058 -0.51) (end 0.14058 -0.51) (layer F.SilkS) (width 0.12))
|
||||
(fp_line (start -0.14058 0.51) (end 0.14058 0.51) (layer F.SilkS) (width 0.12))
|
||||
(fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05))
|
||||
(fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05))
|
||||
(fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05))
|
||||
(fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05))
|
||||
(fp_text user %R (at 0 0) (layer F.Fab)
|
||||
(effects (font (size 0.4 0.4) (thickness 0.06)))
|
||||
)
|
||||
(pad 1 smd roundrect (at -0.65 0) (size 0.8 0.85) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 2 smd roundrect (at 0.65 0) (size 0.8 0.85) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
|
||||
(model ${KICAD6_3DMODEL_DIR}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl
|
||||
(at (xyz 0 0 0))
|
||||
(scale (xyz 1 1 1))
|
||||
(rotate (xyz 0 0 0))
|
||||
)
|
||||
)
|
@ -1,31 +0,0 @@
|
||||
(module "ERJ2G(0402)_L" (layer F.Cu) (tedit 6137302D)
|
||||
(descr "Resistor SMD 0402 (1005 Metric), square (rectangular) end terminal, IPC_7351 least")
|
||||
(tags resistor)
|
||||
(attr smd)
|
||||
(fp_text reference REF** (at 0 -1.17) (layer F.SilkS)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_text value "ERJ2G(0402)_L" (at 0 1.17) (layer F.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_line (start -0.525 0.27) (end -0.525 -0.27) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start -0.525 -0.27) (end 0.525 -0.27) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start 0.525 -0.27) (end 0.525 0.27) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start 0.525 0.27) (end -0.525 0.27) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start -0.153641 -0.38) (end 0.153641 -0.38) (layer F.SilkS) (width 0.12))
|
||||
(fp_line (start -0.153641 0.38) (end 0.153641 0.38) (layer F.SilkS) (width 0.12))
|
||||
(fp_line (start -0.93 0.47) (end -0.93 -0.47) (layer F.CrtYd) (width 0.05))
|
||||
(fp_line (start -0.93 -0.47) (end 0.93 -0.47) (layer F.CrtYd) (width 0.05))
|
||||
(fp_line (start 0.93 -0.47) (end 0.93 0.47) (layer F.CrtYd) (width 0.05))
|
||||
(fp_line (start 0.93 0.47) (end -0.93 0.47) (layer F.CrtYd) (width 0.05))
|
||||
(fp_text user %R (at 0 0) (layer F.Fab)
|
||||
(effects (font (size 0.26 0.26) (thickness 0.04)))
|
||||
)
|
||||
(pad 1 smd roundrect (at -0.4 0) (size 0.45 0.45) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 2 smd roundrect (at 0.4 0) (size 0.45 0.45) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
|
||||
(model ${KICAD6_3DMODEL_DIR}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
|
||||
(at (xyz 0 0 0))
|
||||
(scale (xyz 1 1 1))
|
||||
(rotate (xyz 0 0 0))
|
||||
)
|
||||
)
|
@ -1,72 +0,0 @@
|
||||
(module FT2232H_MINI_MODULE (layer F.Cu) (tedit 616F3922)
|
||||
(fp_text reference REF** (at 0 0.5) (layer F.SilkS)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_text value FT2232H_MINI_MODULE (at 0 -2.54) (layer F.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_line (start -14.605 34.29) (end -14.605 -1.27) (layer F.Fab) (width 0.12))
|
||||
(fp_line (start 14.605 34.29) (end -14.605 34.29) (layer F.Fab) (width 0.12))
|
||||
(fp_line (start 14.605 -1.27) (end 14.605 34.29) (layer F.Fab) (width 0.12))
|
||||
(fp_line (start -14.605 -1.27) (end 14.605 -1.27) (layer F.Fab) (width 0.12))
|
||||
(fp_line (start -13.97 34.29) (end -13.97 1.27) (layer F.CrtYd) (width 0.12))
|
||||
(fp_line (start -8.89 34.29) (end -13.97 34.29) (layer F.CrtYd) (width 0.12))
|
||||
(fp_line (start -8.89 1.27) (end -8.89 34.29) (layer F.CrtYd) (width 0.12))
|
||||
(fp_line (start -13.97 1.27) (end -8.89 1.27) (layer F.CrtYd) (width 0.12))
|
||||
(fp_line (start 8.89 34.29) (end 8.89 1.27) (layer F.CrtYd) (width 0.12))
|
||||
(fp_line (start 13.97 34.29) (end 8.89 34.29) (layer F.CrtYd) (width 0.12))
|
||||
(fp_line (start 13.97 1.27) (end 13.97 34.29) (layer F.CrtYd) (width 0.12))
|
||||
(fp_line (start 8.89 1.27) (end 13.97 1.27) (layer F.CrtYd) (width 0.12))
|
||||
(pad 2.3 thru_hole circle (at -12.7 5.08) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 2.4 thru_hole circle (at -10.16 5.08) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 2.5 thru_hole circle (at -12.7 7.62) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 2.6 thru_hole circle (at -10.16 7.62) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 2.7 thru_hole circle (at -12.7 10.16) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 2.8 thru_hole circle (at -10.16 10.16) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 2.9 thru_hole circle (at -12.7 12.7) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 2.10 thru_hole circle (at -10.16 12.7) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 2.11 thru_hole circle (at -12.7 15.24) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 2.12 thru_hole circle (at -10.16 15.24) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 2.13 thru_hole circle (at -12.7 17.78) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 2.14 thru_hole circle (at -10.16 17.78) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 2.15 thru_hole circle (at -12.7 20.32) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 2.16 thru_hole circle (at -10.16 20.32) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 2.17 thru_hole circle (at -12.7 22.86) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 2.18 thru_hole circle (at -10.16 22.86) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 2.19 thru_hole circle (at -12.7 25.4) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 2.20 thru_hole circle (at -10.16 25.4) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 2.21 thru_hole circle (at -12.7 27.94) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 2.22 thru_hole circle (at -10.16 27.94) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 2.23 thru_hole circle (at -12.7 30.48) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 2.24 thru_hole circle (at -10.16 30.48) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 2.25 thru_hole circle (at -12.7 33.02) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 2.26 thru_hole circle (at -10.16 33.02) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 3.1 thru_hole rect (at 10.16 2.54) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 3.2 thru_hole circle (at 12.7 2.54) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 3.3 thru_hole circle (at 10.16 5.08) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 3.4 thru_hole circle (at 12.7 5.08) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 3.5 thru_hole circle (at 10.16 7.62) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 3.6 thru_hole circle (at 12.7 7.62) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 3.7 thru_hole circle (at 10.16 10.16) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 3.8 thru_hole circle (at 12.7 10.16) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 3.9 thru_hole circle (at 10.16 12.7) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 3.10 thru_hole circle (at 12.7 12.7) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 3.11 thru_hole circle (at 10.16 15.24) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 3.12 thru_hole circle (at 12.7 15.24) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 3.13 thru_hole circle (at 10.16 17.78) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 3.14 thru_hole circle (at 12.7 17.78) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 3.15 thru_hole circle (at 10.16 20.32) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 3.16 thru_hole circle (at 12.7 20.32) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 3.17 thru_hole circle (at 10.16 22.86) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 3.18 thru_hole circle (at 12.7 22.86) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 3.19 thru_hole circle (at 10.16 25.4) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 3.20 thru_hole circle (at 12.7 25.4) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 3.21 thru_hole circle (at 10.16 27.94) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 3.22 thru_hole circle (at 12.7 27.94) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 3.23 thru_hole circle (at 10.16 30.48) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 3.24 thru_hole circle (at 12.7 30.48) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 3.25 thru_hole circle (at 10.16 33.02) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 3.26 thru_hole circle (at 12.7 33.02) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 2.1 thru_hole rect (at -12.7 2.54) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad 2.2 thru_hole circle (at -10.16 2.54) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
|
||||
)
|
@ -1,36 +0,0 @@
|
||||
(footprint "Ferritbead_0603_1608Metric" (version 20211014) (generator pcbnew)
|
||||
(layer "F.Cu")
|
||||
(tedit 61367F9E)
|
||||
(descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator")
|
||||
(tags "resistor")
|
||||
(attr smd)
|
||||
(fp_text reference "REF**" (at 0 -1.43) (layer "F.SilkS")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp 1ce2ffb7-ffc4-4e47-b214-2d2cac3c163f)
|
||||
)
|
||||
(fp_text value "Ferritbead_0603_1608Metric" (at -0.04 1.77) (layer "F.Fab")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp 1aa798ef-05b4-4b6b-8a42-14d04b18e64b)
|
||||
)
|
||||
(fp_text user "${REFERENCE}" (at 0 0) (layer "F.Fab")
|
||||
(effects (font (size 0.4 0.4) (thickness 0.06)))
|
||||
(tstamp 786859eb-3872-47d1-b0a8-5c8bf5b59caa)
|
||||
)
|
||||
(fp_line (start -0.237258 -0.5225) (end 0.237258 -0.5225) (layer "F.SilkS") (width 0.12) (tstamp 70af1960-c7b2-47e7-bb4f-fabc79c69252))
|
||||
(fp_line (start -0.237258 0.5225) (end 0.237258 0.5225) (layer "F.SilkS") (width 0.12) (tstamp ff4b255d-3f6d-4a63-a192-65268a0eae13))
|
||||
(fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer "F.CrtYd") (width 0.05) (tstamp 2a01c873-f57d-492e-bf25-58fe94e9d1e0))
|
||||
(fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer "F.CrtYd") (width 0.05) (tstamp 5433ec0a-0a00-47bb-aad6-1c489b00e5eb))
|
||||
(fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer "F.CrtYd") (width 0.05) (tstamp b4839cf7-915f-4c3a-9fec-7fedef1a70be))
|
||||
(fp_line (start 1.48 0.73) (end -1.48 0.73) (layer "F.CrtYd") (width 0.05) (tstamp e9c83f62-8e46-4552-976d-19d79f6a16bc))
|
||||
(fp_line (start -0.8 -0.4125) (end 0.8 -0.4125) (layer "F.Fab") (width 0.1) (tstamp 6ee555d4-685b-4a36-a65d-b23477664fb4))
|
||||
(fp_line (start 0.8 -0.4125) (end 0.8 0.4125) (layer "F.Fab") (width 0.1) (tstamp a7708b89-613f-4f36-b3fc-95f809398e8c))
|
||||
(fp_line (start 0.8 0.4125) (end -0.8 0.4125) (layer "F.Fab") (width 0.1) (tstamp aa16870e-ed3b-4d28-b416-757f77673a2e))
|
||||
(fp_line (start -0.8 0.4125) (end -0.8 -0.4125) (layer "F.Fab") (width 0.1) (tstamp af57c83d-df74-4689-9e5f-264d28357c24))
|
||||
(pad "1" smd roundrect (at -0.825 0) (size 0.8 0.95) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) (tstamp 1e17f6de-84b5-47ae-a626-24dc38f0554e))
|
||||
(pad "2" smd roundrect (at 0.825 0) (size 0.8 0.95) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) (tstamp d5a5a7f5-3c80-45cd-a86a-2699afb1d2f6))
|
||||
(model "${KIPRJMOD}/../mta1-library/mta1.pretty/3d_models/Ferriit bead-0603.step"
|
||||
(offset (xyz 0 -0.25 0))
|
||||
(scale (xyz 1 1 1))
|
||||
(rotate (xyz 0 0 0))
|
||||
)
|
||||
)
|
@ -1,115 +0,0 @@
|
||||
(footprint "ICE40UP5K-SG48ITRQFN-48QFN" (version 20211014) (generator pcbnew)
|
||||
(layer "F.Cu")
|
||||
(tedit 616F37D0)
|
||||
(descr "QFN, 48 Pin (http://www.st.com/resource/en/datasheet/stm32f042k6.pdf#page=94), generated with kicad-footprint-generator ipc_noLead_generator.py")
|
||||
(tags "QFN NoLead")
|
||||
(attr smd)
|
||||
(fp_text reference "REF**" (at 0 -4.82) (layer "F.SilkS")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp 612d3026-9be4-47d3-9f7e-79566d651b8c)
|
||||
)
|
||||
(fp_text value "ICE40UP5K-SG48ITRQFN-48" (at 0 4.82) (layer "F.Fab")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp 233fb020-8d0e-4587-b6fd-49863319a31c)
|
||||
)
|
||||
(fp_text user "${REFERENCE}" (at 0 0) (layer "F.Fab")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp 9abe78e8-cd02-4892-b378-4098c4083479)
|
||||
)
|
||||
(fp_line (start 3.135 3.61) (end 3.61 3.61) (layer "F.SilkS") (width 0.12) (tstamp 1c154bd3-21fe-4ae7-9d38-138df617c625))
|
||||
(fp_line (start 3.135 -3.61) (end 3.61 -3.61) (layer "F.SilkS") (width 0.12) (tstamp 48022127-c694-4340-80a6-60b3d5340af7))
|
||||
(fp_line (start -3.135 -3.61) (end -3.61 -3.61) (layer "F.SilkS") (width 0.12) (tstamp 5a2e5d6a-fae6-4cda-b43c-f03b0ac47412))
|
||||
(fp_line (start -3.61 3.61) (end -3.61 3.135) (layer "F.SilkS") (width 0.12) (tstamp aeb3689a-92ec-4bc5-a749-8a78707ae63e))
|
||||
(fp_line (start 3.61 -3.61) (end 3.61 -3.135) (layer "F.SilkS") (width 0.12) (tstamp b0b97b4a-9cdf-4481-bf30-f78edaf9300a))
|
||||
(fp_line (start -3.135 3.61) (end -3.61 3.61) (layer "F.SilkS") (width 0.12) (tstamp d2140b97-3ed8-4348-b277-02841d1baecc))
|
||||
(fp_line (start 3.61 3.61) (end 3.61 3.135) (layer "F.SilkS") (width 0.12) (tstamp de5d727c-8e49-454f-97e0-39a6212ad06f))
|
||||
(fp_line (start 4.12 -4.12) (end -4.12 -4.12) (layer "F.CrtYd") (width 0.05) (tstamp 1faea7e2-782e-4cbb-87d8-851452b8a697))
|
||||
(fp_line (start -4.12 4.12) (end 4.12 4.12) (layer "F.CrtYd") (width 0.05) (tstamp 31a2fde1-c811-4054-b9e9-dd278be046a1))
|
||||
(fp_line (start -4.12 -4.12) (end -4.12 4.12) (layer "F.CrtYd") (width 0.05) (tstamp 5e72aa8b-ac6e-4319-9271-0e62fed8055b))
|
||||
(fp_line (start 4.12 4.12) (end 4.12 -4.12) (layer "F.CrtYd") (width 0.05) (tstamp 975354fe-8c32-44ac-8139-97f01f3c2fb9))
|
||||
(fp_line (start 3.5 3.5) (end -3.5 3.5) (layer "F.Fab") (width 0.1) (tstamp 0c7c6a1c-0b48-4b90-91eb-5d85c02062bd))
|
||||
(fp_line (start -3.5 3.5) (end -3.5 -2.5) (layer "F.Fab") (width 0.1) (tstamp 36d15b3a-8621-45c5-a111-a43531896fb1))
|
||||
(fp_line (start 3.5 -3.5) (end 3.5 3.5) (layer "F.Fab") (width 0.1) (tstamp 4e2cbe99-69bc-452b-a8b5-bcd716ef8994))
|
||||
(fp_line (start -3.5 -2.5) (end -2.5 -3.5) (layer "F.Fab") (width 0.1) (tstamp 73ed5572-4501-4247-9671-397eeb753d88))
|
||||
(fp_line (start -2.5 -3.5) (end 3.5 -3.5) (layer "F.Fab") (width 0.1) (tstamp de2f46c5-bacc-4864-90c6-f6cf715b693b))
|
||||
(pad "" smd roundrect (at -2.1 2.1) (size 1.13 1.13) (layers "F.Paste") (roundrect_rratio 0.221239) (tstamp 111acb24-8fc7-4335-afac-cdae01c8fa5b))
|
||||
(pad "" smd roundrect (at -0.7 2.1) (size 1.13 1.13) (layers "F.Paste") (roundrect_rratio 0.221239) (tstamp 15c61562-3b50-4729-9e30-a2d51ba08c48))
|
||||
(pad "" smd roundrect (at 2.1 2.1) (size 1.13 1.13) (layers "F.Paste") (roundrect_rratio 0.221239) (tstamp 1610f979-9f30-4701-908f-2ab18ff38c4e))
|
||||
(pad "" smd roundrect (at 0.7 0.7) (size 1.13 1.13) (layers "F.Paste") (roundrect_rratio 0.221239) (tstamp 1b53423c-aa60-4168-bf2f-bdedd5015dbe))
|
||||
(pad "" smd roundrect (at -2.1 -0.7) (size 1.13 1.13) (layers "F.Paste") (roundrect_rratio 0.221239) (tstamp 3167ec41-f663-40e2-bfc9-3f9ded6d5f24))
|
||||
(pad "" smd roundrect (at 0.7 -0.7) (size 1.13 1.13) (layers "F.Paste") (roundrect_rratio 0.221239) (tstamp 72da1521-ab8e-43e4-a5a1-6c1232aa1523))
|
||||
(pad "" smd roundrect (at -0.7 -2.1) (size 1.13 1.13) (layers "F.Paste") (roundrect_rratio 0.221239) (tstamp ad6ef228-0a1d-4722-8082-42dd79ffd2c1))
|
||||
(pad "" smd roundrect (at -0.7 -0.7) (size 1.13 1.13) (layers "F.Paste") (roundrect_rratio 0.221239) (tstamp b8d5e78f-1b32-4d38-9780-fc78320fb05c))
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(solder_mask_margin -0.299) (zone_connect 2) (tstamp e9ad732c-39a0-4f85-bb64-c1634a3ecf95))
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||||
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)
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||||
)
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||||
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|
||||
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|
||||
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(tstamp 70287de0-48a5-4423-9df4-b3637a983995)
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||||
)
|
||||
(fp_text value "MC2016Z" (at 0 2.54) (layer "F.Fab")
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||||
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||||
)
|
||||
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|
||||
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|
||||
(fp_line (start 1.3 1.1) (end -1.3 1.1) (layer "F.CrtYd") (width 0.05) (tstamp 429f300a-5a92-4aca-a9e6-ea0cb6ea6035))
|
||||
(fp_line (start -1.3 -1.1) (end 1.3 -1.1) (layer "F.CrtYd") (width 0.05) (tstamp ff9343d4-84f2-4396-9e02-04aaa31bdb53))
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||||
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||||
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||||
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||||
(fp_line (start 1 0.8) (end -0.7 0.8) (layer "F.Fab") (width 0.1) (tstamp b06d4c22-a2d3-45a6-8b86-b3abdc291afe))
|
||||
(fp_line (start -1 -0.8) (end 1 -0.8) (layer "F.Fab") (width 0.1) (tstamp e84ca0fc-9f31-465b-abfa-053f521021f5))
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||||
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(pad "4" smd rect (at -0.9 -0.6) (size 0.6 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 16ddb3da-3aaf-4c5f-8323-3c95c55ac2ae))
|
||||
(model "${KIPRJMOD}/../mta1-library/mta1.pretty/3d_models/MC2016Z.step"
|
||||
(offset (xyz 0 0 0))
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||||
(scale (xyz 1 1 1))
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(rotate (xyz -90 0 0))
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||||
)
|
||||
)
|
@ -1,40 +0,0 @@
|
||||
(footprint "MCP1824T-SOT-23-5" (version 20211014) (generator pcbnew)
|
||||
(layer "F.Cu")
|
||||
(tedit 61367FF8)
|
||||
(descr "5-pin SOT23 package")
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||||
(tags "SOT-23-5")
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(attr smd)
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||||
(fp_text reference "REF**" (at 0 -2.9) (layer "F.SilkS")
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(tstamp a17d7f86-0179-400a-95d2-ed0f6cd17a49)
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)
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(fp_text value "MCP1824T-SOT-23-5" (at 0 2.9) (layer "F.Fab")
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(effects (font (size 1 1) (thickness 0.15)))
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(tstamp a3f544d4-dd21-44ac-8509-674521c3bf4a)
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)
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(fp_text user "${REFERENCE}" (at 0 0 90) (layer "F.Fab")
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(effects (font (size 0.5 0.5) (thickness 0.075)))
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||||
(tstamp 4507dadf-eb27-4a89-8b5f-c0830610c77e)
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)
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(fp_line (start 0.9 -1.61) (end -1.55 -1.61) (layer "F.SilkS") (width 0.12) (tstamp fa031bdf-5e99-42dc-8692-15c30e685b5a))
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(fp_line (start -1.9 -1.8) (end 1.9 -1.8) (layer "F.CrtYd") (width 0.05) (tstamp 3676d1ad-dfe9-41bb-9b6c-e14d93943fa2))
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||||
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|
||||
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|
||||
(fp_line (start 1.9 1.8) (end -1.9 1.8) (layer "F.CrtYd") (width 0.05) (tstamp b3fd0d04-2d8b-42a2-8f69-962c14297589))
|
||||
(fp_line (start 0.9 1.55) (end -0.9 1.55) (layer "F.Fab") (width 0.1) (tstamp 344cca83-1ca2-4f3a-9033-74708f6f273d))
|
||||
(fp_line (start -0.9 -0.9) (end -0.25 -1.55) (layer "F.Fab") (width 0.1) (tstamp 7c1dcaa1-0b4e-40e0-964d-fd434e8d90c2))
|
||||
(fp_line (start 0.9 -1.55) (end -0.25 -1.55) (layer "F.Fab") (width 0.1) (tstamp 810546bb-88ef-4798-bd6a-845f73a2a903))
|
||||
(fp_line (start -0.9 -0.9) (end -0.9 1.55) (layer "F.Fab") (width 0.1) (tstamp a0876043-d1a0-43c6-832a-933a920ea949))
|
||||
(fp_line (start 0.9 -1.55) (end 0.9 1.55) (layer "F.Fab") (width 0.1) (tstamp f009fb07-369f-4627-ae7e-c463dbea31d6))
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||||
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|
||||
(pad "2" smd rect (at -1.1 0) (size 1.06 0.65) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp bd932edf-7fdc-4b44-8578-1f565b0464cc))
|
||||
(pad "3" smd rect (at -1.1 0.95) (size 1.06 0.65) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 9db2a5e9-1bf3-44eb-b6b7-29b31eed868d))
|
||||
(pad "4" smd rect (at 1.1 0.95) (size 1.06 0.65) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 1e24719a-bb94-4cfb-822d-1c2b0bd38b64))
|
||||
(pad "5" smd rect (at 1.1 -0.95) (size 1.06 0.65) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 08dbfb9c-6164-4cf0-af58-fa4477606202))
|
||||
(model "${KIPRJMOD}/../mta1-library/mta1.pretty/3d_models/MCP1824T.step"
|
||||
(offset (xyz 0 0 0))
|
||||
(scale (xyz 1 1 1))
|
||||
(rotate (xyz -90 0 -90))
|
||||
)
|
||||
)
|
@ -1,38 +0,0 @@
|
||||
(footprint "NCP752BSN33T1G" (version 20211014) (generator pcbnew)
|
||||
(layer "F.Cu")
|
||||
(tedit 616ECE40)
|
||||
(attr smd)
|
||||
(fp_text reference "REF**" (at 0 -3.81) (layer "F.SilkS")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
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||||
(tstamp ea5a20bb-c640-47a9-806f-cebd20350c6e)
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)
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||||
(fp_text value "NCP752BSN33T1G" (at 0 3.81) (layer "F.Fab")
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||||
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||||
(tstamp 68f3b860-6277-4b0a-881d-06899522ea17)
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||||
)
|
||||
(fp_text user "${REFERENCE}" (at 0 0 90 unlocked) (layer "F.Fab")
|
||||
(effects (font (size 0.5 0.5) (thickness 0.08)))
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||||
(tstamp 86e3dd9b-559d-4b3e-8aa4-cf49dc238d9c)
|
||||
)
|
||||
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|
||||
(fp_line (start 0.9 -1.61) (end -1.55 -1.61) (layer "F.SilkS") (width 0.12) (tstamp e95f7615-6547-498d-94da-56b2857a02ea))
|
||||
(fp_line (start 1.9 -1.5) (end 1.9 1.5) (layer "F.CrtYd") (width 0.05) (tstamp 61c34542-af3e-42b6-b288-c86e516c35ea))
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||||
(fp_line (start -1.9 -1.5) (end 1.9 -1.5) (layer "F.CrtYd") (width 0.05) (tstamp 9548cf5b-a09a-4505-894a-a92b90eefa07))
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|
||||
(fp_line (start -0.5 -1.575) (end 0.825 -1.575) (layer "F.Fab") (width 0.12) (tstamp 8a15ba15-f0c9-4c69-b0c7-f497dae6fff5))
|
||||
(fp_line (start 0.825 -1.575) (end 0.825 1.575) (layer "F.Fab") (width 0.12) (tstamp aab352ee-93c2-4186-9af0-a86a8c96089a))
|
||||
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||||
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|
||||
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|
||||
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|
||||
(pad "3" smd rect (at -1.2 0.95 270) (size 0.7 1) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 5bff8781-6551-4141-995b-343fb5aa90ae))
|
||||
(pad "4" smd rect (at 1.2 0.95 270) (size 0.7 1) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 59005e90-31b3-4c2d-b870-1409713c62cf))
|
||||
(pad "5" smd rect (at 1.2 -0.95 270) (size 0.7 1) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 28707e0a-dd24-4294-bf8c-5773a9252ade))
|
||||
(model "${KICAD6_3DMODEL_DIR}/Package_TO_SOT_SMD.3dshapes/TSOT-23-5.wrl"
|
||||
(offset (xyz 0 0 0))
|
||||
(scale (xyz 1 1 1))
|
||||
(rotate (xyz 0 0 0))
|
||||
)
|
||||
)
|
@ -1,68 +0,0 @@
|
||||
(module PinHeader_1x06_P2.54mm_Horizontal (layer F.Cu) (tedit 6137807A)
|
||||
(descr "Through hole angled pin header, 1x06, 2.54mm pitch, 6mm pin length, single row")
|
||||
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|
||||
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|
||||
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|
||||
)
|
||||
(fp_text value PMOD-Device-x1-Type-2-SPI (at 4.385 14.97 180) (layer F.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_line (start -1.524 13.97) (end -4.04 13.97) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start -4.04 13.97) (end -4.04 -1.27) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start -4.04 -1.27) (end -1.5 -1.27) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start -1.5 -1.27) (end -1.524 13.97) (layer F.Fab) (width 0.1))
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
(fp_line (start -4.04 12.38) (end -10.04 12.38) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start 0.32 10.48) (end -1.5 10.48) (layer F.Fab) (width 0.1))
|
||||
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|
||||
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|
||||
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|
||||
(fp_line (start -10.04 10.48) (end -10.04 9.84) (layer F.Fab) (width 0.1))
|
||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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||||
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|
||||
(fp_line (start 0.32 5.4) (end -1.5 5.4) (layer F.Fab) (width 0.1))
|
||||
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|
||||
(fp_line (start 0.32 4.76) (end -1.5 4.76) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start -4.04 5.4) (end -10.04 5.4) (layer F.Fab) (width 0.1))
|
||||
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|
||||
(fp_line (start -4.04 4.76) (end -10.04 4.76) (layer F.Fab) (width 0.1))
|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
(fp_line (start -4.04 -0.32) (end -10.04 -0.32) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start 1.8 14.5) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05))
|
||||
(fp_line (start 1.8 -1.8) (end -10.55 -1.8) (layer F.CrtYd) (width 0.05))
|
||||
(fp_line (start -10.55 -1.8) (end -10.55 14.5) (layer F.CrtYd) (width 0.05))
|
||||
(fp_line (start -10.55 14.5) (end 1.8 14.5) (layer F.CrtYd) (width 0.05))
|
||||
(fp_text user %R (at -2.77 6.35 270) (layer F.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(pad 6 thru_hole oval (at 0 12.7) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
|
||||
(pad 5 thru_hole oval (at 0 10.16) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
|
||||
(pad 4 thru_hole oval (at 0 7.62) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
|
||||
(pad 3 thru_hole oval (at 0 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
|
||||
(pad 2 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
|
||||
(pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
|
||||
(model ${KICAD6_3DMODEL_DIR}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x06_P2.54mm_Horizontal.wrl
|
||||
(offset (xyz 0 -12.7 0))
|
||||
(scale (xyz 1 1 1))
|
||||
(rotate (xyz 0 0 180))
|
||||
)
|
||||
)
|
@ -1,28 +0,0 @@
|
||||
(footprint "TestPoint_Pad_D1.0mm" (version 20211014) (generator pcbnew)
|
||||
(layer "F.Cu")
|
||||
(tedit 5A0F774F)
|
||||
(descr "SMD pad as test Point, diameter 1.0mm")
|
||||
(tags "test point SMD pad")
|
||||
(attr exclude_from_pos_files exclude_from_bom)
|
||||
(fp_text reference "REF**" (at 0 -2) (layer "F.SilkS")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
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||||
(tstamp ed08342a-eaee-43e9-b96e-1dd00b47763e)
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||||
)
|
||||
(fp_text value "TestPoint_rect1_1.6" (at 0 2) (layer "F.Fab")
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||||
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||||
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|
||||
)
|
||||
(fp_text user "${REFERENCE}" (at 0 -2) (layer "F.Fab")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp ecb9d95d-c3e5-4a80-b7be-d742b8cad331)
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||||
)
|
||||
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||||
(fp_line (start -0.7 1) (end -0.7 -1) (layer "F.SilkS") (width 0.12) (tstamp 0f47421c-1e82-4036-b8e8-a06d02b43b87))
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||||
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||||
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||||
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|
||||
(fp_line (start -0.9 -1.2) (end 0.9 -1.2) (layer "F.CrtYd") (width 0.05) (tstamp 97660885-3db5-4ad6-a54d-91f2fd79e84a))
|
||||
(fp_line (start -0.9 1.2) (end -0.9 -1.2) (layer "F.CrtYd") (width 0.05) (tstamp df586b02-02b3-429d-a0c0-fe4a87110a37))
|
||||
(fp_line (start 0.9 -1.2) (end 0.9 1.2) (layer "F.CrtYd") (width 0.05) (tstamp e2dc4785-3e17-472a-82b9-5050a49344b6))
|
||||
(pad "1" smd roundrect (at 0 0) (size 1 1.6) (layers "F.Cu" "F.Mask") (roundrect_rratio 0.25) (tstamp bab732e9-e79a-410d-8a2b-e7d9e8d299bb))
|
||||
)
|
@ -1,70 +0,0 @@
|
||||
(footprint "U261-241N-4BS60" (version 20211014) (generator pcbnew)
|
||||
(layer "F.Cu")
|
||||
(tedit 0)
|
||||
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|
||||
(fp_text reference "p**" (at 0 6 unlocked) (layer "F.SilkS")
|
||||
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||||
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||||
)
|
||||
(fp_text value "U261-241N-4BS60" (at 0 7.5 unlocked) (layer "F.Fab")
|
||||
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||||
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|
||||
)
|
||||
(fp_text user "${REFERENCE}" (at 0 9 unlocked) (layer "F.Fab")
|
||||
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||||
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||||
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|
||||
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||||
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||||
(fp_line (start -1.95 -3.05) (end -1.05 -3.05) (layer "Edge.Cuts") (width 0.05) (tstamp 8475e8e0-da24-483c-8120-57ca7be2f880))
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||||
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)
|
15
hw/boards/mta1-usb-dev/.gitignore
vendored
15
hw/boards/mta1-usb-dev/.gitignore
vendored
@ -1,15 +0,0 @@
|
||||
# Ignore list for KiCAD Projects
|
||||
*.000
|
||||
*.bak
|
||||
*.bck
|
||||
*.kicad_pcb-bak
|
||||
*.sch-bak
|
||||
*~_autosave-*
|
||||
*.tmp
|
||||
*-save.pro
|
||||
*-save.kicad_pcb
|
||||
fp-info-cache
|
||||
*.net
|
||||
*.dsn
|
||||
*.ses
|
||||
*.swp
|
@ -1,289 +0,0 @@
|
||||
CERN Open Hardware Licence Version 2 - Strongly Reciprocal
|
||||
|
||||
|
||||
Preamble
|
||||
|
||||
CERN has developed this licence to promote collaboration among
|
||||
hardware designers and to provide a legal tool which supports the
|
||||
freedom to use, study, modify, share and distribute hardware designs
|
||||
and products based on those designs. Version 2 of the CERN Open
|
||||
Hardware Licence comes in three variants: CERN-OHL-P (permissive); and
|
||||
two reciprocal licences: CERN-OHL-W (weakly reciprocal) and this
|
||||
licence, CERN-OHL-S (strongly reciprocal).
|
||||
|
||||
The CERN-OHL-S is copyright CERN 2020. Anyone is welcome to use it, in
|
||||
unmodified form only.
|
||||
|
||||
Use of this Licence does not imply any endorsement by CERN of any
|
||||
Licensor or their designs nor does it imply any involvement by CERN in
|
||||
their development.
|
||||
|
||||
|
||||
1 Definitions
|
||||
|
||||
1.1 'Licence' means this CERN-OHL-S.
|
||||
|
||||
1.2 'Compatible Licence' means
|
||||
|
||||
a) any earlier version of the CERN Open Hardware licence, or
|
||||
|
||||
b) any version of the CERN-OHL-S, or
|
||||
|
||||
c) any licence which permits You to treat the Source to which
|
||||
it applies as licensed under CERN-OHL-S provided that on
|
||||
Conveyance of any such Source, or any associated Product You
|
||||
treat the Source in question as being licensed under
|
||||
CERN-OHL-S.
|
||||
|
||||
1.3 'Source' means information such as design materials or digital
|
||||
code which can be applied to Make or test a Product or to
|
||||
prepare a Product for use, Conveyance or sale, regardless of its
|
||||
medium or how it is expressed. It may include Notices.
|
||||
|
||||
1.4 'Covered Source' means Source that is explicitly made available
|
||||
under this Licence.
|
||||
|
||||
1.5 'Product' means any device, component, work or physical object,
|
||||
whether in finished or intermediate form, arising from the use,
|
||||
application or processing of Covered Source.
|
||||
|
||||
1.6 'Make' means to create or configure something, whether by
|
||||
manufacture, assembly, compiling, loading or applying Covered
|
||||
Source or another Product or otherwise.
|
||||
|
||||
1.7 'Available Component' means any part, sub-assembly, library or
|
||||
code which:
|
||||
|
||||
a) is licensed to You as Complete Source under a Compatible
|
||||
Licence; or
|
||||
|
||||
b) is available, at the time a Product or the Source containing
|
||||
it is first Conveyed, to You and any other prospective
|
||||
licensees
|
||||
|
||||
i) as a physical part with sufficient rights and
|
||||
information (including any configuration and
|
||||
programming files and information about its
|
||||
characteristics and interfaces) to enable it either to
|
||||
be Made itself, or to be sourced and used to Make the
|
||||
Product; or
|
||||
ii) as part of the normal distribution of a tool used to
|
||||
design or Make the Product.
|
||||
|
||||
1.8 'Complete Source' means the set of all Source necessary to Make
|
||||
a Product, in the preferred form for making modifications,
|
||||
including necessary installation and interfacing information
|
||||
both for the Product, and for any included Available Components.
|
||||
If the format is proprietary, it must also be made available in
|
||||
a format (if the proprietary tool can create it) which is
|
||||
viewable with a tool available to potential licensees and
|
||||
licensed under a licence approved by the Free Software
|
||||
Foundation or the Open Source Initiative. Complete Source need
|
||||
not include the Source of any Available Component, provided that
|
||||
You include in the Complete Source sufficient information to
|
||||
enable a recipient to Make or source and use the Available
|
||||
Component to Make the Product.
|
||||
|
||||
1.9 'Source Location' means a location where a Licensor has placed
|
||||
Covered Source, and which that Licensor reasonably believes will
|
||||
remain easily accessible for at least three years for anyone to
|
||||
obtain a digital copy.
|
||||
|
||||
1.10 'Notice' means copyright, acknowledgement and trademark notices,
|
||||
Source Location references, modification notices (subsection
|
||||
3.3(b)) and all notices that refer to this Licence and to the
|
||||
disclaimer of warranties that are included in the Covered
|
||||
Source.
|
||||
|
||||
1.11 'Licensee' or 'You' means any person exercising rights under
|
||||
this Licence.
|
||||
|
||||
1.12 'Licensor' means a natural or legal person who creates or
|
||||
modifies Covered Source. A person may be a Licensee and a
|
||||
Licensor at the same time.
|
||||
|
||||
1.13 'Convey' means to communicate to the public or distribute.
|
||||
|
||||
|
||||
2 Applicability
|
||||
|
||||
2.1 This Licence governs the use, copying, modification, Conveying
|
||||
of Covered Source and Products, and the Making of Products. By
|
||||
exercising any right granted under this Licence, You irrevocably
|
||||
accept these terms and conditions.
|
||||
|
||||
2.2 This Licence is granted by the Licensor directly to You, and
|
||||
shall apply worldwide and without limitation in time.
|
||||
|
||||
2.3 You shall not attempt to restrict by contract or otherwise the
|
||||
rights granted under this Licence to other Licensees.
|
||||
|
||||
2.4 This Licence is not intended to restrict fair use, fair dealing,
|
||||
or any other similar right.
|
||||
|
||||
|
||||
3 Copying, Modifying and Conveying Covered Source
|
||||
|
||||
3.1 You may copy and Convey verbatim copies of Covered Source, in
|
||||
any medium, provided You retain all Notices.
|
||||
|
||||
3.2 You may modify Covered Source, other than Notices, provided that
|
||||
You irrevocably undertake to make that modified Covered Source
|
||||
available from a Source Location should You Convey a Product in
|
||||
circumstances where the recipient does not otherwise receive a
|
||||
copy of the modified Covered Source. In each case subsection 3.3
|
||||
shall apply.
|
||||
|
||||
You may only delete Notices if they are no longer applicable to
|
||||
the corresponding Covered Source as modified by You and You may
|
||||
add additional Notices applicable to Your modifications.
|
||||
Including Covered Source in a larger work is modifying the
|
||||
Covered Source, and the larger work becomes modified Covered
|
||||
Source.
|
||||
|
||||
3.3 You may Convey modified Covered Source (with the effect that You
|
||||
shall also become a Licensor) provided that You:
|
||||
|
||||
a) retain Notices as required in subsection 3.2;
|
||||
|
||||
b) add a Notice to the modified Covered Source stating that You
|
||||
have modified it, with the date and brief description of how
|
||||
You have modified it;
|
||||
|
||||
c) add a Source Location Notice for the modified Covered Source
|
||||
if You Convey in circumstances where the recipient does not
|
||||
otherwise receive a copy of the modified Covered Source; and
|
||||
|
||||
d) license the modified Covered Source under the terms and
|
||||
conditions of this Licence (or, as set out in subsection
|
||||
8.3, a later version, if permitted by the licence of the
|
||||
original Covered Source). Such modified Covered Source must
|
||||
be licensed as a whole, but excluding Available Components
|
||||
contained in it, which remain licensed under their own
|
||||
applicable licences.
|
||||
|
||||
|
||||
4 Making and Conveying Products
|
||||
|
||||
You may Make Products, and/or Convey them, provided that You either
|
||||
provide each recipient with a copy of the Complete Source or ensure
|
||||
that each recipient is notified of the Source Location of the Complete
|
||||
Source. That Complete Source is Covered Source, and You must
|
||||
accordingly satisfy Your obligations set out in subsection 3.3. If
|
||||
specified in a Notice, the Product must visibly and securely display
|
||||
the Source Location on it or its packaging or documentation in the
|
||||
manner specified in that Notice.
|
||||
|
||||
|
||||
5 Research and Development
|
||||
|
||||
You may Convey Covered Source, modified Covered Source or Products to
|
||||
a legal entity carrying out development, testing or quality assurance
|
||||
work on Your behalf provided that the work is performed on terms which
|
||||
prevent the entity from both using the Source or Products for its own
|
||||
internal purposes and Conveying the Source or Products or any
|
||||
modifications to them to any person other than You. Any modifications
|
||||
made by the entity shall be deemed to be made by You pursuant to
|
||||
subsection 3.2.
|
||||
|
||||
|
||||
6 DISCLAIMER AND LIABILITY
|
||||
|
||||
6.1 DISCLAIMER OF WARRANTY -- The Covered Source and any Products
|
||||
are provided 'as is' and any express or implied warranties,
|
||||
including, but not limited to, implied warranties of
|
||||
merchantability, of satisfactory quality, non-infringement of
|
||||
third party rights, and fitness for a particular purpose or use
|
||||
are disclaimed in respect of any Source or Product to the
|
||||
maximum extent permitted by law. The Licensor makes no
|
||||
representation that any Source or Product does not or will not
|
||||
infringe any patent, copyright, trade secret or other
|
||||
proprietary right. The entire risk as to the use, quality, and
|
||||
performance of any Source or Product shall be with You and not
|
||||
the Licensor. This disclaimer of warranty is an essential part
|
||||
of this Licence and a condition for the grant of any rights
|
||||
granted under this Licence.
|
||||
|
||||
6.2 EXCLUSION AND LIMITATION OF LIABILITY -- The Licensor shall, to
|
||||
the maximum extent permitted by law, have no liability for
|
||||
direct, indirect, special, incidental, consequential, exemplary,
|
||||
punitive or other damages of any character including, without
|
||||
limitation, procurement of substitute goods or services, loss of
|
||||
use, data or profits, or business interruption, however caused
|
||||
and on any theory of contract, warranty, tort (including
|
||||
negligence), product liability or otherwise, arising in any way
|
||||
in relation to the Covered Source, modified Covered Source
|
||||
and/or the Making or Conveyance of a Product, even if advised of
|
||||
the possibility of such damages, and You shall hold the
|
||||
Licensor(s) free and harmless from any liability, costs,
|
||||
damages, fees and expenses, including claims by third parties,
|
||||
in relation to such use.
|
||||
|
||||
|
||||
7 Patents
|
||||
|
||||
7.1 Subject to the terms and conditions of this Licence, each
|
||||
Licensor hereby grants to You a perpetual, worldwide,
|
||||
non-exclusive, no-charge, royalty-free, irrevocable (except as
|
||||
stated in subsections 7.2 and 8.4) patent licence to Make, have
|
||||
Made, use, offer to sell, sell, import, and otherwise transfer
|
||||
the Covered Source and Products, where such licence applies only
|
||||
to those patent claims licensable by such Licensor that are
|
||||
necessarily infringed by exercising rights under the Covered
|
||||
Source as Conveyed by that Licensor.
|
||||
|
||||
7.2 If You institute patent litigation against any entity (including
|
||||
a cross-claim or counterclaim in a lawsuit) alleging that the
|
||||
Covered Source or a Product constitutes direct or contributory
|
||||
patent infringement, or You seek any declaration that a patent
|
||||
licensed to You under this Licence is invalid or unenforceable
|
||||
then any rights granted to You under this Licence shall
|
||||
terminate as of the date such process is initiated.
|
||||
|
||||
|
||||
8 General
|
||||
|
||||
8.1 If any provisions of this Licence are or subsequently become
|
||||
invalid or unenforceable for any reason, the remaining
|
||||
provisions shall remain effective.
|
||||
|
||||
8.2 You shall not use any of the name (including acronyms and
|
||||
abbreviations), image, or logo by which the Licensor or CERN is
|
||||
known, except where needed to comply with section 3, or where
|
||||
the use is otherwise allowed by law. Any such permitted use
|
||||
shall be factual and shall not be made so as to suggest any kind
|
||||
of endorsement or implication of involvement by the Licensor or
|
||||
its personnel.
|
||||
|
||||
8.3 CERN may publish updated versions and variants of this Licence
|
||||
which it considers to be in the spirit of this version, but may
|
||||
differ in detail to address new problems or concerns. New
|
||||
versions will be published with a unique version number and a
|
||||
variant identifier specifying the variant. If the Licensor has
|
||||
specified that a given variant applies to the Covered Source
|
||||
without specifying a version, You may treat that Covered Source
|
||||
as being released under any version of the CERN-OHL with that
|
||||
variant. If no variant is specified, the Covered Source shall be
|
||||
treated as being released under CERN-OHL-S. The Licensor may
|
||||
also specify that the Covered Source is subject to a specific
|
||||
version of the CERN-OHL or any later version in which case You
|
||||
may apply this or any later version of CERN-OHL with the same
|
||||
variant identifier published by CERN.
|
||||
|
||||
8.4 This Licence shall terminate with immediate effect if You fail
|
||||
to comply with any of its terms and conditions.
|
||||
|
||||
8.5 However, if You cease all breaches of this Licence, then Your
|
||||
Licence from any Licensor is reinstated unless such Licensor has
|
||||
terminated this Licence by giving You, while You remain in
|
||||
breach, a notice specifying the breach and requiring You to cure
|
||||
it within 30 days, and You have failed to come into compliance
|
||||
in all material respects by the end of the 30 day period. Should
|
||||
You repeat the breach after receipt of a cure notice and
|
||||
subsequent reinstatement, this Licence will terminate
|
||||
immediately and permanently. Section 6 shall continue to apply
|
||||
after any termination.
|
||||
|
||||
8.6 This Licence shall not be enforceable except by a Licensor
|
||||
acting as such, and third party beneficiary rights are
|
||||
specifically excluded.
|
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T4
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||||
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||||
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T5
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T6
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G05
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G05
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T0
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M30
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1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
1,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2
|
||||
]
|
||||
],
|
||||
"rule_severities": {
|
||||
"bus_definition_conflict": "error",
|
||||
"bus_entry_needed": "error",
|
||||
"bus_label_syntax": "error",
|
||||
"bus_to_bus_conflict": "error",
|
||||
"bus_to_net_conflict": "error",
|
||||
"different_unit_footprint": "error",
|
||||
"different_unit_net": "error",
|
||||
"duplicate_reference": "error",
|
||||
"duplicate_sheet_names": "error",
|
||||
"extra_units": "error",
|
||||
"global_label_dangling": "warning",
|
||||
"hier_label_mismatch": "error",
|
||||
"label_dangling": "error",
|
||||
"lib_symbol_issues": "warning",
|
||||
"multiple_net_names": "warning",
|
||||
"net_not_bus_member": "warning",
|
||||
"no_connect_connected": "warning",
|
||||
"no_connect_dangling": "warning",
|
||||
"pin_not_connected": "error",
|
||||
"pin_not_driven": "error",
|
||||
"pin_to_pin": "warning",
|
||||
"power_pin_not_driven": "error",
|
||||
"similar_labels": "warning",
|
||||
"unannotated": "error",
|
||||
"unit_value_mismatch": "error",
|
||||
"unresolved_variable": "error",
|
||||
"wire_dangling": "error"
|
||||
}
|
||||
},
|
||||
"libraries": {
|
||||
"pinned_footprint_libs": [],
|
||||
"pinned_symbol_libs": []
|
||||
},
|
||||
"meta": {
|
||||
"filename": "mta1_usb_dev.kicad_pro",
|
||||
"version": 1
|
||||
},
|
||||
"net_settings": {
|
||||
"classes": [
|
||||
{
|
||||
"bus_width": 12.0,
|
||||
"clearance": 0.2,
|
||||
"diff_pair_gap": 0.25,
|
||||
"diff_pair_via_gap": 0.25,
|
||||
"diff_pair_width": 0.2,
|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.3,
|
||||
"microvia_drill": 0.1,
|
||||
"name": "Default",
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 0.25,
|
||||
"via_diameter": 0.8,
|
||||
"via_drill": 0.4,
|
||||
"wire_width": 6.0
|
||||
}
|
||||
],
|
||||
"meta": {
|
||||
"version": 2
|
||||
},
|
||||
"net_colors": null
|
||||
},
|
||||
"pcbnew": {
|
||||
"last_paths": {
|
||||
"gencad": "",
|
||||
"idf": "",
|
||||
"netlist": "../../../../../../../../../Desktop/mta1_signer_pmod.net",
|
||||
"specctra_dsn": "",
|
||||
"step": "",
|
||||
"vrml": ""
|
||||
},
|
||||
"page_layout_descr_file": ""
|
||||
},
|
||||
"schematic": {
|
||||
"annotate_start_num": 0,
|
||||
"drawing": {
|
||||
"default_line_thickness": 6.0,
|
||||
"default_text_size": 50.0,
|
||||
"field_names": [],
|
||||
"intersheets_ref_own_page": false,
|
||||
"intersheets_ref_prefix": "",
|
||||
"intersheets_ref_short": false,
|
||||
"intersheets_ref_show": false,
|
||||
"intersheets_ref_suffix": "",
|
||||
"junction_size_choice": 3,
|
||||
"label_size_ratio": 0.25,
|
||||
"pin_symbol_size": 0.0,
|
||||
"text_offset_ratio": 0.08
|
||||
},
|
||||
"legacy_lib_dir": "",
|
||||
"legacy_lib_list": [],
|
||||
"meta": {
|
||||
"version": 1
|
||||
},
|
||||
"net_format_name": "Pcbnew",
|
||||
"ngspice": {
|
||||
"fix_include_paths": true,
|
||||
"fix_passive_vals": false,
|
||||
"meta": {
|
||||
"version": 0
|
||||
},
|
||||
"model_mode": 0,
|
||||
"workbook_filename": ""
|
||||
},
|
||||
"page_layout_descr_file": "C:\\Users\\matt\\Other-Repos\\mta1_mkdf\\hw\\boards\\mta1-library\\CERN_OHL_S_drawing_sheet.kicad_wks",
|
||||
"plot_directory": "./",
|
||||
"spice_adjust_passive_values": false,
|
||||
"spice_external_command": "spice \"%I\"",
|
||||
"subpart_first_id": 65,
|
||||
"subpart_id_separator": 0
|
||||
},
|
||||
"sheets": [
|
||||
[
|
||||
"8fc062a7-114d-48eb-a8f8-71128838f380",
|
||||
""
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-0000611cc101",
|
||||
"Application FPGA"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00006161400b",
|
||||
"Interface FPGA"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-0000611a4eb9",
|
||||
"Power Supply"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-0000615cf037",
|
||||
"Programming Interface"
|
||||
]
|
||||
],
|
||||
"text_variables": {}
|
||||
}
|
File diff suppressed because it is too large
Load Diff
Binary file not shown.
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -1,3 +0,0 @@
|
||||
(sym_lib_table
|
||||
(lib (name "mta1")(type "KiCad")(uri "${KIPRJMOD}/../mta1-library/mta1.kicad_sym")(options "")(descr ""))
|
||||
)
|
@ -1,102 +0,0 @@
|
||||
# MTA1-USB-DEV hardware test
|
||||
|
||||
This is a collection of hardware bringup tests for the MTA1-USB-DEV board. The goal is to verify that the board has been manufactured correctly.
|
||||
|
||||
|
||||
## Power tests
|
||||
|
||||
### Voltage rails
|
||||
|
||||
The MTA1-USB-DEV board has three voltage supplies- 1.2V, 3.3V, and 2.5V. These are measured by hand using a sufficiently accurate DMM. Additionally, the power supplies must come up in a specific sequence (see the notes on schematic page 2). This can be verified using an oscilloscope. No specific program is required to be loaded on the FPGAs.
|
||||
|
||||
![](voltage_rail_test_setup.jpg)
|
||||
|
||||
Instructions for testing power-on sequence (note: similar procedure applies for testing with logic analyzer):
|
||||
|
||||
1. Remove the FTDI programming daughterboard from the MTA1-USB-DEV board
|
||||
2. Attach test leads to the 1.2V, 2.5V, 3.3V, and 5V input test pads on the dev board, and to ground points physically near these test points.
|
||||
3. Connect oscilloscope probe leads to each of these connections. Alternatively, a logic analyzer with analog function can be used for this purpose.
|
||||
4. Configure the vertical scale of each input to 0.5V/division. Configure the horizontal scale to ?ms/division.
|
||||
5. Configure the trigger to use the 5V channel as an input, and to a positive-edge trigger, with the reference set to 0.5V.
|
||||
6. Configure the acquisition mode to 'normal'
|
||||
7. Apply power to the board using a USB C cable.
|
||||
8. The full power-on sequence should be captured by the oscilloscope. Verify that it meets the timing requirements detailed in the schematic.
|
||||
|
||||
![](voltage_rails_test.png)
|
||||
|
||||
Instructions for testing the accuracies of each voltage supply:
|
||||
|
||||
1. Remove the FTDI programming daughterboard from the MTA1-USB-DEV board
|
||||
2. Apply power to the board using a USB C cable.
|
||||
3. Use a sufficiently accurate DMM to measure the voltage of the 1.2V, 2.5V, and 3.3V rails, at their test points.
|
||||
|
||||
TODO: Set specs for this.
|
||||
|
||||
### Inrush current (optional)
|
||||
|
||||
The inrush current for USB is limited to < xxx mA. Use a current probe to check that the inrush current is lower than the spec.
|
||||
|
||||
## GPIO test
|
||||
|
||||
This test verifies that all digital lines on the board are connected correctly. To achieve this, unique signals are routed through each connection on each FPGA, and their outputs are measured manually using a logic analyzer or oscilloscope. This is intended to lay the basis for an automated production test.
|
||||
|
||||
![](gpio_test_setup.jpg)
|
||||
|
||||
Instructions:
|
||||
|
||||
1. Attach the FTDI programming daughterboard to the MTA1-USB-DEV board.
|
||||
2. Set the programming jumpers for both the interface and application FPGAs to the 'flash' setting.
|
||||
3. Attach a logic analyzer to GPIO1-4 on both the interface and application fpgas.
|
||||
4. Connect the FTDI board to a computer using a USB A to USB mini cable. Do not connect anything to the USB C port on the MTA1-USB-DEV board.
|
||||
5. Run the included script 'gpio_test.sh' to automatically build the test gateware, and to load it into the flash memories for each FPGA.
|
||||
5. Verify that the LEDs are blinking, and that all colors (R, G, and B) are visible.
|
||||
6. Press the user button on the application FPGA. Verify that the appliction LED turns off.
|
||||
7. Release the user button the application FPGA. Verify that the application LED turns back on.
|
||||
8. Configure the logic analyzer to read all GPIO channels. Verifiy that each GPIO is outputting square waves at different frequencies:
|
||||
|
||||
![](gpio_test.png)
|
||||
|
||||
Explanations of how each subcircuit are covered by this test follow.
|
||||
|
||||
### Interface and Application FPGA programming connections
|
||||
|
||||
This inclues '_ICE_MISO, _ICE_MOSI, _ICE_SCK, _ICE_SS, _CRESET, _CDONE'. These nets are tested by using the FTDI chip to program the FPGAs in 'live' mode. All nets need to be connected correctly to their respective FPGA for the programming to succeed.
|
||||
|
||||
Next, the programming jumpers must be configured to target flash, and the FTDI chip is then used program the SPI flashes. If the FPGAs boot, then it is assumed that the nets are also connected to the SPI flashes.
|
||||
|
||||
### Interface FPGA to App FPGA connections
|
||||
|
||||
This includes nets 'MISO, SCK, MOSI, SS', as well as EXTRA1-EXTRA10. These pins are tested by passing a single clock signal back and forth between the two FPGAs. The clock signal is first output from the interface FPGA on the HOST_SS net. It is then used as a clock input on the application FGPA, where it is divided by two, then output by the application FPGA on the HOST_SCK net. This strategy continues until all pins are used. All connections can then be verified at once by looking at the clock frequency of the final net, HOST_EXTRA10. This should be ~2.93KHz.
|
||||
|
||||
|
||||
### GPIO connections
|
||||
|
||||
Both the interface and application FPGAs have '_GPIO1, _GPIO2, _GPIO3, _GPIO4' expansion connections. These are tested by outputting different frequency clocks to them, which are manually verified using a logic analyzer or oscilloscope.
|
||||
|
||||
### RGB LEDs
|
||||
|
||||
Both the interface and application FPGAs have RGB status LEDs. These are verified by feeding different clock signals into each color channel, so that the LEDs will rapidly cycle through many output colors. The LED connections can then be verified by looking at them.
|
||||
|
||||
### Interface FPGA 48MHz clock
|
||||
|
||||
The external clock that is connected to the interface FPGA has a test pad that can be used by a high precision counter to measure both frequency and clock stability. For the initial bringup test, only the frequency is measured.
|
||||
|
||||
### Application FPGA user button
|
||||
|
||||
The user button is used to gate the output of the application FPGA LED. The button is considered connected if it turns off the application FPGA LED when it is pressed.
|
||||
|
||||
## USB test
|
||||
|
||||
The USB connection on the interface FPGA is verified by loading a USB-capable bitstream onto the interface FPGA, and verifying that a Linux-based host is able to see the device.
|
||||
|
||||
![](usb_test_setup.jpg)
|
||||
|
||||
Instructions:
|
||||
|
||||
1. Attach the FTDI programming daughterboard to the MTA1-USB-DEV board.
|
||||
2. Set the programming jumpers for both the interface and application FPGAs to the 'flash' setting.
|
||||
3. Connect the FTDI board to a computer (running Linux) using a USB A to USB mini cable.
|
||||
4. Connect the USB C port to the computer using a USB A to USB C cable.
|
||||
5. Run the included script 'usb_test.sh'. The script will load a USB bitstream into the application FPGA
|
||||
6. After a short delay, the script will test if the USB device has attached to the computer, and print the test result.
|
||||
|
@ -1,59 +0,0 @@
|
||||
TARGET = top
|
||||
|
||||
VERILOG_FILES = \
|
||||
top.v
|
||||
|
||||
PIN_CONFIG_FILE = app.pcf
|
||||
|
||||
default: $(TARGET).bin
|
||||
|
||||
$(TARGET).json: $(VERILOG_FILES)
|
||||
yosys \
|
||||
-q \
|
||||
-p "synth_ice40 -abc2 -relut -top ${TARGET} -json $(TARGET).json" \
|
||||
-l $(TARGET)-yosys.log \
|
||||
$(VERILOG_FILES)
|
||||
|
||||
TARGET_MODULE = top
|
||||
view-ideal:
|
||||
yosys -p 'read_verilog ${VERILOG_FILES}; proc; opt; select ${TARGET_MODULE}; show -format dot -viewer xdot -pause' &
|
||||
|
||||
view-real:
|
||||
yosys -p 'read_verilog ${VERILOG_FILES}; proc; opt; synth_ice40; show -format dot -viewer xdot -pause' &
|
||||
|
||||
$(TARGET).asc: $(TARGET).json $(PIN_CONFIG_FILE)
|
||||
nextpnr-ice40 \
|
||||
--up5k \
|
||||
--package sg48 \
|
||||
--json $(TARGET).json \
|
||||
--pcf $(PIN_CONFIG_FILE) \
|
||||
--asc $(TARGET).asc \
|
||||
-l $(TARGET)-nextpnr.log
|
||||
|
||||
$(TARGET).bin: $(TARGET).asc
|
||||
icepack $(TARGET).asc $(TARGET).bin
|
||||
|
||||
stats: $(TARGET).json $(TARGET).asc
|
||||
sed -n '/=== top ===/,/6\.28/p' $(TARGET)-yosys.log
|
||||
sed -n '/Info: Device utilisation/,/Info: Placed/p' $(TARGET)-nextpnr.log
|
||||
fgrep 'Info: Max frequency for clock' $(TARGET)-nextpnr.log
|
||||
|
||||
lint: $(VERILOG_FILES)
|
||||
verilator --lint-only -Wall -Wno-DECLFILENAME -Ihw_blocks $(VERILOG_FILES)
|
||||
|
||||
.PHONY: flash
|
||||
flash: ${TARGET}.bin
|
||||
iceprog -I A ${TARGET}.bin
|
||||
|
||||
.PHONY: load
|
||||
load: ${TARGET}.bin
|
||||
iceprog -S -I A ${TARGET}.bin
|
||||
|
||||
.PHONY: clean
|
||||
clean:
|
||||
$(RM) -f \
|
||||
$(TARGET).json \
|
||||
$(TARGET).asc \
|
||||
$(TARGET)-yosys.log \
|
||||
$(TARGET)-nextpnr.log \
|
||||
$(TARGET).bin
|
@ -1,17 +0,0 @@
|
||||
|
||||
module SB_HFOSC #(
|
||||
parameter CLKHF_DIV
|
||||
) (
|
||||
input CLKHFPU,
|
||||
input CLKHFEN,
|
||||
|
||||
output reg CLKHF
|
||||
);
|
||||
|
||||
// Nonfunctional, for linting only.
|
||||
always @(*) begin
|
||||
CLKHF = (CLKHFPU & CLKHFEN);
|
||||
end
|
||||
|
||||
endmodule
|
||||
|
@ -1,34 +0,0 @@
|
||||
|
||||
|
||||
module SB_RGBA_DRV #(
|
||||
parameter CURRENT_MODE,
|
||||
parameter RGB0_CURRENT,
|
||||
parameter RGB1_CURRENT,
|
||||
parameter RGB2_CURRENT
|
||||
) (
|
||||
output reg RGB0,
|
||||
output reg RGB1,
|
||||
output reg RGB2,
|
||||
|
||||
input RGBLEDEN,
|
||||
input RGB0PWM,
|
||||
input RGB1PWM,
|
||||
input RGB2PWM,
|
||||
input CURREN
|
||||
);
|
||||
|
||||
// Nonfunctional, for linting only.
|
||||
always @(*) begin
|
||||
RGB0 = (RGBLEDEN & CURREN & RGB0PWM);
|
||||
end
|
||||
|
||||
always @(*) begin
|
||||
RGB1 = (RGBLEDEN & CURREN & RGB1PWM);
|
||||
end
|
||||
|
||||
always @(*) begin
|
||||
RGB2 = (RGBLEDEN & CURREN & RGB2PWM);
|
||||
end
|
||||
|
||||
endmodule
|
||||
|
@ -1,29 +0,0 @@
|
||||
# Host Communication
|
||||
set_io HOST_SS 42
|
||||
set_io HOST_SCK 43
|
||||
set_io HOST_MOSI 44
|
||||
set_io HOST_MISO 45
|
||||
|
||||
set_io HOST_EXTRA1 46
|
||||
set_io HOST_EXTRA2 47
|
||||
set_io HOST_EXTRA3 48
|
||||
set_io HOST_EXTRA4 2
|
||||
set_io HOST_EXTRA5 3
|
||||
set_io HOST_EXTRA6 4
|
||||
set_io HOST_EXTRA7 9
|
||||
set_io HOST_EXTRA8 10
|
||||
set_io HOST_EXTRA9 11
|
||||
set_io HOST_EXTRA10 12
|
||||
|
||||
# Expansion
|
||||
set_io APP_GPIO1 38
|
||||
set_io APP_GPIO2 37
|
||||
set_io APP_GPIO3 36
|
||||
set_io APP_GPIO4 35
|
||||
|
||||
## User IO
|
||||
set_io APP_BUTTON 34
|
||||
|
||||
set_io RGB0 39
|
||||
set_io RGB1 40
|
||||
set_io RGB2 41
|
@ -1,105 +0,0 @@
|
||||
module top (
|
||||
|
||||
input HOST_SS,
|
||||
output reg HOST_SCK,
|
||||
input HOST_MOSI,
|
||||
output reg HOST_MISO,
|
||||
input HOST_EXTRA1,
|
||||
output reg HOST_EXTRA2,
|
||||
input HOST_EXTRA3,
|
||||
output reg HOST_EXTRA4,
|
||||
input HOST_EXTRA5,
|
||||
output reg HOST_EXTRA6,
|
||||
input HOST_EXTRA7,
|
||||
output reg HOST_EXTRA8,
|
||||
input HOST_EXTRA9,
|
||||
output reg HOST_EXTRA10,
|
||||
|
||||
|
||||
output APP_GPIO1,
|
||||
output APP_GPIO2,
|
||||
output APP_GPIO3,
|
||||
output APP_GPIO4,
|
||||
|
||||
input APP_BUTTON,
|
||||
|
||||
output RGB0,
|
||||
output RGB1,
|
||||
output RGB2
|
||||
);
|
||||
|
||||
//############ Feedback test ############################################
|
||||
|
||||
always @(posedge HOST_SS) begin
|
||||
HOST_SCK <= ~HOST_SCK;
|
||||
end
|
||||
|
||||
always @(posedge HOST_MOSI) begin
|
||||
HOST_MISO <= ~HOST_MISO;
|
||||
end
|
||||
|
||||
always @(posedge HOST_EXTRA1) begin
|
||||
HOST_EXTRA2 <= ~HOST_EXTRA2;
|
||||
end
|
||||
|
||||
always @(posedge HOST_EXTRA3) begin
|
||||
HOST_EXTRA4 <= ~HOST_EXTRA4;
|
||||
end
|
||||
|
||||
always @(posedge HOST_EXTRA5) begin
|
||||
HOST_EXTRA6 <= ~HOST_EXTRA6;
|
||||
end
|
||||
|
||||
always @(posedge HOST_EXTRA7) begin
|
||||
HOST_EXTRA8 <= ~HOST_EXTRA8;
|
||||
end
|
||||
|
||||
always @(posedge HOST_EXTRA9) begin
|
||||
HOST_EXTRA10 <= ~HOST_EXTRA10;
|
||||
end
|
||||
|
||||
reg [10:0] slow_led;
|
||||
|
||||
always @(posedge HOST_EXTRA10) begin
|
||||
slow_led <= slow_led + 1;
|
||||
end
|
||||
|
||||
SB_RGBA_DRV #(
|
||||
.CURRENT_MODE("0b1"), // half-current mode
|
||||
.RGB0_CURRENT("0b000001"), // 2 mA
|
||||
.RGB1_CURRENT("0b000001"), // 2 mA
|
||||
.RGB2_CURRENT("0b000001") // 2 mA
|
||||
) RGBA_DRV (
|
||||
.RGB0(RGB0),
|
||||
.RGB1(RGB1),
|
||||
.RGB2(RGB2),
|
||||
//.RGBLEDEN(1'b1),
|
||||
.RGBLEDEN(APP_BUTTON),
|
||||
.RGB0PWM(slow_led[10]),
|
||||
.RGB1PWM(slow_led[9]),
|
||||
.RGB2PWM(slow_led[8]),
|
||||
.CURREN(1'b1)
|
||||
);
|
||||
|
||||
//############ Clock / Reset ############################################
|
||||
|
||||
wire clk;
|
||||
|
||||
// Configure the HFOSC
|
||||
SB_HFOSC #(
|
||||
.CLKHF_DIV("0b01") // 00: 48MHz, 01: 24MHz, 10: 12MHz, 11: 6MHz
|
||||
) u_hfosc (
|
||||
.CLKHFPU(1'b1),
|
||||
.CLKHFEN(1'b1),
|
||||
.CLKHF(clk)
|
||||
);
|
||||
|
||||
//############ GPIO tests ###############################################
|
||||
|
||||
assign APP_GPIO1 = clk;
|
||||
assign APP_GPIO2 = HOST_SS;
|
||||
assign APP_GPIO3 = HOST_EXTRA8;
|
||||
assign APP_GPIO4 = HOST_EXTRA10;
|
||||
|
||||
|
||||
endmodule
|
Binary file not shown.
Before Width: | Height: | Size: 80 KiB |
@ -1,9 +0,0 @@
|
||||
#!/bin/bash
|
||||
|
||||
pushd app_test
|
||||
make flash
|
||||
popd
|
||||
|
||||
pushd int_test
|
||||
make flash
|
||||
popd
|
Binary file not shown.
Before Width: | Height: | Size: 46 KiB |
Binary file not shown.
@ -1,59 +0,0 @@
|
||||
TARGET = top
|
||||
|
||||
VERILOG_FILES = \
|
||||
top.v
|
||||
|
||||
PIN_CONFIG_FILE = int.pcf
|
||||
|
||||
default: $(TARGET).bin
|
||||
|
||||
$(TARGET).json: $(VERILOG_FILES)
|
||||
yosys \
|
||||
-q \
|
||||
-p "synth_ice40 -abc2 -relut -top ${TARGET} -json $(TARGET).json" \
|
||||
-l $(TARGET)-yosys.log \
|
||||
$(VERILOG_FILES)
|
||||
|
||||
TARGET_MODULE = top
|
||||
view-ideal:
|
||||
yosys -p 'read_verilog ${VERILOG_FILES}; proc; opt; select ${TARGET_MODULE}; show -format dot -viewer xdot -pause' &
|
||||
|
||||
view-real:
|
||||
yosys -p 'read_verilog ${VERILOG_FILES}; proc; opt; synth_ice40; show -format dot -viewer xdot -pause' &
|
||||
|
||||
$(TARGET).asc: $(TARGET).json $(PIN_CONFIG_FILE)
|
||||
nextpnr-ice40 \
|
||||
--up5k \
|
||||
--package sg48 \
|
||||
--json $(TARGET).json \
|
||||
--pcf $(PIN_CONFIG_FILE) \
|
||||
--asc $(TARGET).asc \
|
||||
-l $(TARGET)-nextpnr.log
|
||||
|
||||
$(TARGET).bin: $(TARGET).asc
|
||||
icepack $(TARGET).asc $(TARGET).bin
|
||||
|
||||
stats: $(TARGET).json $(TARGET).asc
|
||||
sed -n '/=== top ===/,/6\.28/p' $(TARGET)-yosys.log
|
||||
sed -n '/Info: Device utilisation/,/Info: Placed/p' $(TARGET)-nextpnr.log
|
||||
fgrep 'Info: Max frequency for clock' $(TARGET)-nextpnr.log
|
||||
|
||||
lint: $(VERILOG_FILES)
|
||||
verilator --lint-only -Wall -Wno-DECLFILENAME -Ihw_blocks $(VERILOG_FILES)
|
||||
|
||||
.PHONY: flash
|
||||
flash: ${TARGET}.bin
|
||||
iceprog -I B ${TARGET}.bin
|
||||
|
||||
.PHONY: load
|
||||
load: ${TARGET}.bin
|
||||
iceprog -S -I B ${TARGET}.bin
|
||||
|
||||
.PHONY: clean
|
||||
clean:
|
||||
$(RM) -f \
|
||||
$(TARGET).json \
|
||||
$(TARGET).asc \
|
||||
$(TARGET)-yosys.log \
|
||||
$(TARGET)-nextpnr.log \
|
||||
$(TARGET).bin
|
@ -1,17 +0,0 @@
|
||||
|
||||
module SB_HFOSC #(
|
||||
parameter CLKHF_DIV
|
||||
) (
|
||||
input CLKHFPU,
|
||||
input CLKHFEN,
|
||||
|
||||
output reg CLKHF
|
||||
);
|
||||
|
||||
// Nonfunctional, for linting only.
|
||||
always @(*) begin
|
||||
CLKHF = (CLKHFPU & CLKHFEN);
|
||||
end
|
||||
|
||||
endmodule
|
||||
|
@ -1,34 +0,0 @@
|
||||
|
||||
|
||||
module SB_RGBA_DRV #(
|
||||
parameter CURRENT_MODE,
|
||||
parameter RGB0_CURRENT,
|
||||
parameter RGB1_CURRENT,
|
||||
parameter RGB2_CURRENT
|
||||
) (
|
||||
output reg RGB0,
|
||||
output reg RGB1,
|
||||
output reg RGB2,
|
||||
|
||||
input RGBLEDEN,
|
||||
input RGB0PWM,
|
||||
input RGB1PWM,
|
||||
input RGB2PWM,
|
||||
input CURREN
|
||||
);
|
||||
|
||||
// Nonfunctional, for linting only.
|
||||
always @(*) begin
|
||||
RGB0 = (RGBLEDEN & CURREN & RGB0PWM);
|
||||
end
|
||||
|
||||
always @(*) begin
|
||||
RGB1 = (RGBLEDEN & CURREN & RGB1PWM);
|
||||
end
|
||||
|
||||
always @(*) begin
|
||||
RGB2 = (RGBLEDEN & CURREN & RGB2PWM);
|
||||
end
|
||||
|
||||
endmodule
|
||||
|
@ -1,34 +0,0 @@
|
||||
# Host Communication
|
||||
set_io HOST_SS 28
|
||||
set_io HOST_SCK 27
|
||||
set_io HOST_MOSI 26
|
||||
set_io HOST_MISO 25
|
||||
|
||||
set_io HOST_EXTRA1 23
|
||||
set_io HOST_EXTRA2 21
|
||||
set_io HOST_EXTRA3 20
|
||||
set_io HOST_EXTRA4 19
|
||||
set_io HOST_EXTRA5 18
|
||||
set_io HOST_EXTRA6 13
|
||||
set_io HOST_EXTRA7 12
|
||||
set_io HOST_EXTRA8 11
|
||||
set_io HOST_EXTRA9 10
|
||||
set_io HOST_EXTRA10 9
|
||||
|
||||
# USB
|
||||
#set_io INT_USB_D- 46
|
||||
#set_io INT_USB_D+ 47
|
||||
#set_io INT_USB_PU 48
|
||||
|
||||
set_io INT_CLOCK 44
|
||||
|
||||
# Expansion
|
||||
set_io INT_GPIO1 38
|
||||
set_io INT_GPIO2 37
|
||||
set_io INT_GPIO3 36
|
||||
set_io INT_GPIO4 35
|
||||
|
||||
## User IO
|
||||
set_io RGB0 39
|
||||
set_io RGB1 40
|
||||
set_io RGB2 41
|
@ -1,102 +0,0 @@
|
||||
module top (
|
||||
input INT_CLOCK,
|
||||
|
||||
output reg HOST_SS,
|
||||
input HOST_SCK,
|
||||
output reg HOST_MOSI,
|
||||
input HOST_MISO,
|
||||
output reg HOST_EXTRA1,
|
||||
input HOST_EXTRA2,
|
||||
output reg HOST_EXTRA3,
|
||||
input HOST_EXTRA4,
|
||||
output reg HOST_EXTRA5,
|
||||
input HOST_EXTRA6,
|
||||
output reg HOST_EXTRA7,
|
||||
input HOST_EXTRA8,
|
||||
output reg HOST_EXTRA9,
|
||||
input HOST_EXTRA10,
|
||||
|
||||
|
||||
output INT_GPIO1,
|
||||
output INT_GPIO2,
|
||||
output INT_GPIO3,
|
||||
output INT_GPIO4,
|
||||
|
||||
output RGB0,
|
||||
output RGB1,
|
||||
output RGB2
|
||||
);
|
||||
//############ Feedback test ############################################
|
||||
|
||||
always @(posedge INT_CLOCK) begin
|
||||
HOST_SS <= ~HOST_SS;
|
||||
end
|
||||
|
||||
always @(posedge HOST_SCK) begin
|
||||
HOST_MOSI <= ~HOST_MOSI;
|
||||
end
|
||||
|
||||
always @(posedge HOST_MISO) begin
|
||||
HOST_EXTRA1 <= ~HOST_EXTRA1;
|
||||
end
|
||||
|
||||
always @(posedge HOST_EXTRA2) begin
|
||||
HOST_EXTRA3 <= ~HOST_EXTRA3;
|
||||
end
|
||||
|
||||
always @(posedge HOST_EXTRA4) begin
|
||||
HOST_EXTRA5 <= ~HOST_EXTRA5;
|
||||
end
|
||||
|
||||
always @(posedge HOST_EXTRA6) begin
|
||||
HOST_EXTRA7 <= ~HOST_EXTRA7;
|
||||
end
|
||||
|
||||
always @(posedge HOST_EXTRA8) begin
|
||||
HOST_EXTRA9 <= ~HOST_EXTRA9;
|
||||
end
|
||||
|
||||
reg [10:0] slow_led;
|
||||
|
||||
always @(posedge HOST_EXTRA10) begin
|
||||
slow_led <= slow_led + 1;
|
||||
end
|
||||
|
||||
SB_RGBA_DRV #(
|
||||
.CURRENT_MODE("0b1"), // half-current mode
|
||||
.RGB0_CURRENT("0b000001"), // 2 mA
|
||||
.RGB1_CURRENT("0b000001"), // 2 mA
|
||||
.RGB2_CURRENT("0b000001") // 2 mA
|
||||
) RGBA_DRV (
|
||||
.RGB0(RGB0),
|
||||
.RGB1(RGB1),
|
||||
.RGB2(RGB2),
|
||||
.RGBLEDEN(1'b1),
|
||||
.RGB0PWM(slow_led[10]),
|
||||
.RGB1PWM(slow_led[9]),
|
||||
.RGB2PWM(slow_led[8]),
|
||||
.CURREN(1'b1)
|
||||
);
|
||||
|
||||
|
||||
//############ Clock / Reset ############################################
|
||||
|
||||
wire clk;
|
||||
|
||||
// Configure the HFOSC
|
||||
SB_HFOSC #(
|
||||
.CLKHF_DIV("0b01") // 00: 48MHz, 01: 24MHz, 10: 12MHz, 11: 6MHz
|
||||
) u_hfosc (
|
||||
.CLKHFPU(1'b1),
|
||||
.CLKHFEN(1'b1),
|
||||
.CLKHF(clk)
|
||||
);
|
||||
|
||||
//############ GPIO tests ###############################################
|
||||
|
||||
assign INT_GPIO1 = clk;
|
||||
assign INT_GPIO2 = INT_CLOCK;
|
||||
assign INT_GPIO3 = HOST_EXTRA8;
|
||||
assign INT_GPIO4 = HOST_EXTRA10;
|
||||
|
||||
endmodule
|
Binary file not shown.
@ -1,11 +0,0 @@
|
||||
#!/bin/bash
|
||||
set -e
|
||||
|
||||
iceprog -I B interface_fpga_usb.bin
|
||||
echo 'Waiting 2s for USB to stabalize'
|
||||
sleep 2
|
||||
if lsusb -d 1d50:6159; then
|
||||
echo 'device found, USB test passed'
|
||||
else
|
||||
echo 'device not found, USB test failed'
|
||||
fi
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user