Joachim Strömbergson
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1f47991ac2
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Add test2: Read out UDI
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
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2023-07-04 09:04:27 +02:00 |
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Joachim Strömbergson
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6d9890d050
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Add test1: Read out name and version
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
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2023-07-04 09:04:26 +02:00 |
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Joachim Strömbergson
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49eac9d101
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Complete init of DUT and input, output display
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
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2023-07-04 09:04:26 +02:00 |
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Joachim Strömbergson
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1909833952
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Add header with info and license
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
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2023-07-04 09:04:26 +02:00 |
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Joachim Strömbergson
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b1993742bb
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Fix testbench buik including DUT instantiation
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
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2023-07-04 09:04:26 +02:00 |
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Joachim Strömbergson
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2fb61bba73
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Add UDI used during simulation
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
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2023-07-04 09:04:26 +02:00 |
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Joachim Strömbergson
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cb2fd573b3
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Add dummy LED macro driver module needed for simulation
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
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2023-07-04 09:04:26 +02:00 |
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Joachim Strömbergson
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61598f57e5
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Add initial version of testbench annd Makfile for building sim target
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
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2023-07-04 09:04:26 +02:00 |
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Joachim Strömbergson
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97e3e25d98
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Update the UART README with info about the core and its API
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
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2023-07-04 09:04:25 +02:00 |
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Joachim Strömbergson
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704d67c8ab
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Add Makefile to build sim. Debug sim build
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
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2023-07-04 09:04:25 +02:00 |
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Joachim Strömbergson
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819b93deff
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Complete testbench and update README with API info
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
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2023-07-04 09:04:25 +02:00 |
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Joachim Strömbergson
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bbff7576df
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Fix markdown syntax for API listing
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
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2023-07-04 09:04:25 +02:00 |
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Joachim Strömbergson
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e6eaad87dc
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Update README with info about the timer API
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
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2023-07-04 09:04:25 +02:00 |
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Joachim Strömbergson
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4c54b4b60b
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Add info about the API in the README
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
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2023-07-04 09:04:25 +02:00 |
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Joachim Strömbergson
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18bb9b8599
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Making the testbench self checking
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
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2023-07-04 09:04:25 +02:00 |
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Joachim Strömbergson
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1d2a71ec0c
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Change file extension to markdown
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
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2023-07-04 09:04:24 +02:00 |
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Joachim Strömbergson
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1e97e27e66
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Updated README, completed testcase and cleaned up the testbench
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
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2023-07-04 09:04:24 +02:00 |
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Joachim Strömbergson
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9d188a2f7f
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Add more info about how the timer works
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
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2023-07-04 09:04:24 +02:00 |
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Joachim Strömbergson
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7c9dfaf45a
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Add testcase for the timer top level wrapper and clean up the tb
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
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2023-07-04 09:04:24 +02:00 |
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Joachim Strömbergson
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c185849ae4
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Minor cleanup of README, testbench and Makefile
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
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2023-07-04 09:04:24 +02:00 |
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Joachim Strömbergson
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000b7644b5
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Update fw ram last address to match new mem size
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
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2023-03-08 13:31:45 +01:00 |
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Joachim Strömbergson
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2e2ca04ab7
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Bump FPGA design version to 5
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
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2023-03-07 12:30:10 +01:00 |
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Joachim Strömbergson
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d075cc72c3
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Manually merged changes for scrambling
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
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2023-03-07 10:42:59 +01:00 |
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Joachim Strömbergson
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3eb5b7879c
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Add API address to read out number of bytes in Rx FIFO
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
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2023-03-07 08:22:27 +01:00 |
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Joachim Strömbergson
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4db4e39205
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Clarify the purpose and functionality of the tk1 core
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
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2023-03-07 08:20:18 +01:00 |
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Joachim Strömbergson
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6f327d2ff9
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Block changing of monitor addresses when enabled
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
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2023-03-06 15:41:55 +01:00 |
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Joachim Strömbergson
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66ebe5089a
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Add fw_ram as always active exe monitor area
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
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2023-03-06 15:41:55 +01:00 |
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Joachim Strömbergson
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5c05ae657e
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exe monitor can only be enabled, not disabled
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
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2023-03-06 15:41:55 +01:00 |
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Joachim Strömbergson
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7612d00ccf
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Feed CPU illegal instruction to trigger trap
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
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2023-03-06 15:41:55 +01:00 |
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Joachim Strömbergson
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86ea45e10a
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Add CPU execution monitor
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
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2023-03-06 15:41:53 +01:00 |
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Joachim Strömbergson
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e514f778b2
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Remove stray variable for blake2s address update
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
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2023-03-06 11:32:38 +01:00 |
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Joachim Strömbergson
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adcccc44de
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Change reset value for the trap led to black
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
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2023-03-06 11:32:38 +01:00 |
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Joachim Strömbergson
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d335dd708a
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Add HW to detect trap in cpu and signal using the LEDs
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
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2023-03-06 11:32:38 +01:00 |
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Joachim Strömbergson
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caeee54e19
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Change LED reset value to black
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
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2023-02-27 13:21:51 +01:00 |
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Joachim Strömbergson
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6137b88fe0
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Add separate start, stop bits and running status bit in API
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
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2023-01-30 15:48:57 +01:00 |
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Joachim Strömbergson
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f020495695
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Cleanup of tb for timer core
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
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2023-01-20 10:14:44 +01:00 |
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Joachim Strömbergson
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9ce2b8a84a
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Only accept tx data when the core is ready
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
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2023-01-02 13:10:40 +01:00 |
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Joachim Strömbergson
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5c74a0727c
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Lock down access to UDI in app mode
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
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2022-12-20 12:05:56 +01:00 |
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Joachim Strömbergson
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a48dc7cbbb
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Add reg writable from FW, readable from app for blake2s entry
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
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2022-12-08 16:16:15 +01:00 |
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Daniel Lublin
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49d4735f17
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Use TKey name
Signed-off-by: Daniel Lublin <daniel@lublin.se>
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2022-12-02 08:03:06 +01:00 |
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Joachim Strömbergson
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8061491f6e
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Cleanup, and use fifo_empty to indicate data available
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2022-10-28 13:12:47 +02:00 |
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Joachim Strömbergson
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24d8680772
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Improve detection of empty and full FIFO
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2022-10-28 13:09:21 +02:00 |
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Joachim Strömbergson
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0eacbca2f9
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Increase size of RX-FIFO to 512 bytes
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2022-10-28 12:48:13 +02:00 |
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Daniel Lublin
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4b4f014d38
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Rename to TK1
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2022-10-26 09:20:02 +02:00 |
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Daniel Lublin
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675fa1087f
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Raise bps to 62500
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2022-10-21 14:10:41 +02:00 |
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Joachim Strömbergson
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19b75e71fe
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Fix bit counter and simplify emtropy extraction
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2022-10-19 13:10:26 +02:00 |
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Joachim Strömbergson
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c07c15a8b8
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Update README to describe the new ROSC based TRNG
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2022-10-19 09:37:58 +02:00 |
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Joachim Strömbergson
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ddd969870e
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Count from init values to one, not zero
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2022-10-18 11:06:40 +02:00 |
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Joachim Strömbergson
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f6046d55a9
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Change ADDR_CTRL to be a pulsed start_stop signal
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2022-10-14 08:50:30 +02:00 |
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Joachim Strömbergson
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c3f7c5fb06
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Ignore the prescaler if prescaler init value is zero
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2022-10-13 16:24:03 +02:00 |
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