Commit Graph

64 Commits

Author SHA1 Message Date
Joachim Strömbergson
1909833952
Add header with info and license
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2023-07-04 09:04:26 +02:00
Joachim Strömbergson
b1993742bb
Fix testbench buik including DUT instantiation
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2023-07-04 09:04:26 +02:00
Joachim Strömbergson
2fb61bba73
Add UDI used during simulation
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2023-07-04 09:04:26 +02:00
Joachim Strömbergson
cb2fd573b3
Add dummy LED macro driver module needed for simulation
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2023-07-04 09:04:26 +02:00
Joachim Strömbergson
61598f57e5
Add initial version of testbench annd Makfile for building sim target
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2023-07-04 09:04:26 +02:00
Joachim Strömbergson
97e3e25d98
Update the UART README with info about the core and its API
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2023-07-04 09:04:25 +02:00
Joachim Strömbergson
704d67c8ab
Add Makefile to build sim. Debug sim build
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2023-07-04 09:04:25 +02:00
Joachim Strömbergson
819b93deff
Complete testbench and update README with API info
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2023-07-04 09:04:25 +02:00
Joachim Strömbergson
bbff7576df
Fix markdown syntax for API listing
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2023-07-04 09:04:25 +02:00
Joachim Strömbergson
e6eaad87dc
Update README with info about the timer API
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2023-07-04 09:04:25 +02:00
Joachim Strömbergson
4c54b4b60b
Add info about the API in the README
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2023-07-04 09:04:25 +02:00
Joachim Strömbergson
18bb9b8599
Making the testbench self checking
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2023-07-04 09:04:25 +02:00
Joachim Strömbergson
1d2a71ec0c
Change file extension to markdown
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2023-07-04 09:04:24 +02:00
Joachim Strömbergson
1e97e27e66
Updated README, completed testcase and cleaned up the testbench
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2023-07-04 09:04:24 +02:00
Joachim Strömbergson
9d188a2f7f
Add more info about how the timer works
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2023-07-04 09:04:24 +02:00
Joachim Strömbergson
7c9dfaf45a
Add testcase for the timer top level wrapper and clean up the tb
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2023-07-04 09:04:24 +02:00
Joachim Strömbergson
c185849ae4
Minor cleanup of README, testbench and Makefile
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2023-07-04 09:04:24 +02:00
Joachim Strömbergson
000b7644b5
Update fw ram last address to match new mem size
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2023-03-08 13:31:45 +01:00
Joachim Strömbergson
2e2ca04ab7
Bump FPGA design version to 5
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2023-03-07 12:30:10 +01:00
Joachim Strömbergson
d075cc72c3
Manually merged changes for scrambling
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2023-03-07 10:42:59 +01:00
Joachim Strömbergson
3eb5b7879c Add API address to read out number of bytes in Rx FIFO
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2023-03-07 08:22:27 +01:00
Joachim Strömbergson
4db4e39205
Clarify the purpose and functionality of the tk1 core
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2023-03-07 08:20:18 +01:00
Joachim Strömbergson
6f327d2ff9
Block changing of monitor addresses when enabled
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2023-03-06 15:41:55 +01:00
Joachim Strömbergson
66ebe5089a
Add fw_ram as always active exe monitor area
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2023-03-06 15:41:55 +01:00
Joachim Strömbergson
5c05ae657e
exe monitor can only be enabled, not disabled
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2023-03-06 15:41:55 +01:00
Joachim Strömbergson
7612d00ccf
Feed CPU illegal instruction to trigger trap
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2023-03-06 15:41:55 +01:00
Joachim Strömbergson
86ea45e10a
Add CPU execution monitor
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2023-03-06 15:41:53 +01:00
Joachim Strömbergson
e514f778b2 Remove stray variable for blake2s address update
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2023-03-06 11:32:38 +01:00
Joachim Strömbergson
adcccc44de Change reset value for the trap led to black
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2023-03-06 11:32:38 +01:00
Joachim Strömbergson
d335dd708a Add HW to detect trap in cpu and signal using the LEDs
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2023-03-06 11:32:38 +01:00
Joachim Strömbergson
caeee54e19
Change LED reset value to black
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2023-02-27 13:21:51 +01:00
Joachim Strömbergson
6137b88fe0 Add separate start, stop bits and running status bit in API
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2023-01-30 15:48:57 +01:00
Joachim Strömbergson
f020495695
Cleanup of tb for timer core
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2023-01-20 10:14:44 +01:00
Joachim Strömbergson
9ce2b8a84a
Only accept tx data when the core is ready
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2023-01-02 13:10:40 +01:00
Joachim Strömbergson
5c74a0727c
Lock down access to UDI in app mode
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2022-12-20 12:05:56 +01:00
Joachim Strömbergson
a48dc7cbbb
Add reg writable from FW, readable from app for blake2s entry
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2022-12-08 16:16:15 +01:00
Daniel Lublin
49d4735f17
Use TKey name
Signed-off-by: Daniel Lublin <daniel@lublin.se>
2022-12-02 08:03:06 +01:00
Joachim Strömbergson
8061491f6e
Cleanup, and use fifo_empty to indicate data available 2022-10-28 13:12:47 +02:00
Joachim Strömbergson
24d8680772
Improve detection of empty and full FIFO 2022-10-28 13:09:21 +02:00
Joachim Strömbergson
0eacbca2f9
Increase size of RX-FIFO to 512 bytes 2022-10-28 12:48:13 +02:00
Daniel Lublin
4b4f014d38
Rename to TK1 2022-10-26 09:20:02 +02:00
Daniel Lublin
675fa1087f
Raise bps to 62500 2022-10-21 14:10:41 +02:00
Joachim Strömbergson
19b75e71fe
Fix bit counter and simplify emtropy extraction 2022-10-19 13:10:26 +02:00
Joachim Strömbergson
c07c15a8b8
Update README to describe the new ROSC based TRNG 2022-10-19 09:37:58 +02:00
Joachim Strömbergson
ddd969870e
Count from init values to one, not zero 2022-10-18 11:06:40 +02:00
Joachim Strömbergson
f6046d55a9
Change ADDR_CTRL to be a pulsed start_stop signal 2022-10-14 08:50:30 +02:00
Joachim Strömbergson
c3f7c5fb06
Ignore the prescaler if prescaler init value is zero 2022-10-13 16:24:03 +02:00
Joachim Strömbergson
2be934ee22
Restore start and stop bits, but clarify in documenation 2022-10-13 16:10:08 +02:00
Joachim Strömbergson
00d180d34e
Change to a single run bit and update access control 2022-10-13 14:58:39 +02:00
Joachim Strömbergson
1b03459ab3
Remove app-accessible debug register from mta1 core 2022-10-13 13:51:19 +02:00