Updates Readme with:
- Dynamic execution mode control in hardware
- ROM execution
- Syscall API
- Sensitive assets only read-/writable before first switch to app mode
- SPI master only accessible in firmware mode
After the first time system_mode is set to one, the assets will no
longer be read- or writeable, even if system_mode is set to zero at a
later syscall. This is to make sure syscalls does not have the same
privilege as the firmware has at first boot.
We need to monitor when system_mode is set to one, otherwise we might
accedentially lock the assets before actually leaving firmware, for
example if firmware would use a function set in any of the registers
used in system_mode_ctrl.
Co-authored-by: Mikael Ågren <mikael@tillitis.se>
This is dynamically set by hw in system_mode_ctrl. ROM will reset to
executable, but will be marked as non-executable as soon as we are no
longer executing in ROM, like system_mode.
ROM will be marked as executable again, if function calls are made to
either `syscall_addr_reg` or `blake2s_addr_reg`. Set reset value of
`blake2s_addr_reg` to an illegal address, halting the CPU if it is
called unset.
The blake2s function is 4-byte aligned, to ensure the cpu_addr is is
aligned with the address in the register.
Co-authored-by: Mikael Ågren <mikael@tillitis.se>
Raise privilege (go to firmware mode) when a function call occurs
to the function set in syscall_addr_reg. Automatically revoke privilege
when executing above ROM (go to app mode).
Remove the option of writing to system_mode through the API.
Co-authored-by: Mikael Ågren <mikael@tillitis.se>
Add a register to store an address to a syscall function defined in
firmware. Set the reset value to an illegal address, to make sure a call
to an unset address will halt the CPU.
Co-authored-by: Mikael Ågren <mikael@tillitis.se>
- Compare against an expected result and count errors
- Exit with the right error code
- Lower write_word() to 1 clk cycle instead of two. It only requires one
clock cycle to write, otherwise if it is two one have to compensate for it
in the tests since we are counting cycles.
Remove redundant timer state. This fixes a bug where the timer misses a
clock cycle every time the prescaler counter reaches 1. This means if
one uses a large prescaler, like 18E6, it is barely noticeable, but if
one have a low prescaler and a high timer value it becomes significant.
This also yields the running_* registers redundant, which are removed.
Add clarity to the readme.
Update the timer to default to values of one, for prescaler and timer
count.
This removes the possibility to configure the bit rate, data bits and
stop bits at runtime from the API. This reduces the
usage of LCs with ~4%.
It is still possible to configure the core before building.
Update digest of application_fpga.bin.sha256
- The API changes name from `_SWITCH_APP` to `_SYSTEM_MODE_CTRL`.
- The registers and wires changes name to `system_mode_*`, instead of a
mix of `switch_app_*` and `fw_app_mode`.
production_test related files are moved out of this repository, since it
relates to production of the hardware and not the fpga construction or
firmware.
Setting the working directory to a directory that exist.
Previously the working directory was set to /build/hw/application_fpga.
But that path does not exist since hw/application_fpga was mounted to
/build. Thus resulting in an error:
'Error: workdir "/build/hw/application_fpga" does not exist on
container'
* -abc2, run two passes of 'abc' for slightly improved logic density
* -device u, optimize timing for up5k device
* -dff, run 'abc'/'abc9' with -dff (D flip flop) option
Update digest of application_fpga.bin
Flags:
--indentation_spaces=2
--wrap_end_else_clauses=true
Verify flag, used in checkfmt, only returns error if the last file is
not formatted, temporary fix implemented with grep.
