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  • c292595ee3
         ch552: Raise UART IRQ priority and tune USB polling period Jonas Thörnblad 2025-01-23 13:44:53 +01:00
  • 361890042a
         ch552: Update USB polling period Jonas Thörnblad 2025-01-22 15:55:51 +01:00
  • 5029eb1d39
         ch552: Fix CDC configuration problem on Windows Jonas Thörnblad 2025-01-17 15:30:36 +01:00
  • 04ec938200
         ch552: Add new USB debug pipe (TKEYCTRL) Jonas Thörnblad 2025-01-15 15:08:18 +01:00
  • bfc43093ec
         fpga: Fix bitrate counter bug Jonas Thörnblad 2024-12-16 13:05:36 +01:00
  • 07dc20e4e1
         fpga/testfw: Update clock frequency to 24 MHz Jonas Thörnblad 2025-01-09 15:15:16 +01:00
  • 0a634c76da
         ch552: Use the new hardware CTS signals for UART access Jonas Thörnblad 2024-12-17 17:33:14 +01:00
  • ab4ef5fdf9
         fpga: Introduce CTS signals for UART Jonas Thörnblad 2024-12-17 17:18:45 +01:00
  • f3706dcfcc
         fpga: Increase UART baud rate to 500k Mikael Ågren 2024-10-09 09:45:29 +02:00
  • a0c031eb25
         fw: Minimal CDC implementation of new framing protocol Mikael Ågren 2024-09-16 14:26:12 +02:00
  • 1ab2b8068b
         testfw: Use special linker script for test firmware Michael Cardell Widerkrantz 2025-02-11 09:24:08 +01:00
  • 5327cb2410
         Init .bss on testfw, too Michael Cardell Widerkrantz 2025-02-10 11:44:58 +01:00
  • f8dafe10cc
         build/ci: Update binary digests Michael Cardell Widerkrantz 2025-02-07 16:18:52 +01:00
  • d80df50973
         fpga: Formatting Verilog Michael Cardell Widerkrantz 2025-02-07 16:11:26 +01:00
  • dde524b425
         testfw: Make it work with new USB Mode Protocol Michael Cardell Widerkrantz 2025-02-07 16:03:34 +01:00
  • 108120ffbf
         Add alternative way of handling USB Mode Protocol Michael Cardell Widerkrantz 2025-02-06 12:03:48 +01:00
  • 193d6a44cb
         ci: Include Verilog formatting check in CI Michael Cardell Widerkrantz 2025-02-07 13:09:03 +01:00
  • db532745f4
         build: Add -Wno-GENUNNAMED to LINT_FLAGS Michael Cardell Widerkrantz 2025-02-07 11:27:37 +01:00
  • 944821b5bf
         build/ci: Use new tkey-builder Michael Cardell Widerkrantz 2025-02-06 15:34:12 +01:00
  • 2d5dfdc40f
         podman/docker: Run bash as login shell Michael Cardell Widerkrantz 2025-01-31 15:47:27 +01:00
  • a266a38faf
         toolchain: Introduce buildtools.sh script Michael Cardell Widerkrantz 2025-01-29 14:13:11 +01:00
  • cff708c523
         docs: Add Castor release notes so far Michael Cardell Widerkrantz 2025-01-24 15:42:15 +01:00
  • 524e5b4494
         ch552: Raise UART IRQ priority and tune USB polling period Jonas Thörnblad 2025-01-23 13:44:53 +01:00
  • c0482b7237
         ch552: Update USB polling period Jonas Thörnblad 2025-01-22 15:55:51 +01:00
  • b5623037b7
         ch552: Fix CDC configuration problem on Windows Jonas Thörnblad 2025-01-17 15:30:36 +01:00
  • 64de346f06
         ch552: Add new USB debug pipe (TKEYCTRL) Jonas Thörnblad 2025-01-15 15:08:18 +01:00
  • b1fbaa69a5
         fpga: Fix bitrate counter bug Jonas Thörnblad 2024-12-16 13:05:36 +01:00
  • 68f5c9af26
         fpga/testfw: Update clock frequency to 24 MHz Jonas Thörnblad 2025-01-09 15:15:16 +01:00
  • 50aacb4a5c
         ch552: Use the new hardware CTS signals for UART access Jonas Thörnblad 2024-12-17 17:33:14 +01:00
  • dd4e970446
         fpga: Introduce CTS signals for UART Jonas Thörnblad 2024-12-17 17:18:45 +01:00
  • 6e062e7c89
         fpga: Increase UART baud rate to 500k Mikael Ågren 2024-10-09 09:45:29 +02:00
  • 2ec36baaf4
         fw: Minimal CDC implementation of new framing protocol Mikael Ågren 2024-09-16 14:26:12 +02:00
  • 1b9bbc4eba
         ch552: Wrap accesses to UART output buffers Mikael Ågren 2024-09-17 13:36:39 +02:00
  • b443359e9c
         ch552: Add USB HID and protocol support over UART Jonas Thörnblad 2024-07-04 18:24:07 +02:00
  • 90fca5d3dd
         ch552: Move usb_strings.h to the include directory Jonas Thörnblad 2024-07-04 18:19:02 +02:00
  • 0af82ee566
         fpga/fw: Extend checks for invalid memory accesses Jonas Thörnblad 2024-12-20 10:38:17 +01:00
  • 68cecdfa92
         Update USB polling period (bInterval) for CDC, HID and TKEYCTRL endpoints. cth-1 Jonas Thörnblad 2025-01-22 15:55:51 +01:00
  • 3b03e7b051
         Fix CDC configuration problem on Windows when we have a composite device (multiple different Device Classes). Add "Interface Association Descriptor" to make it work. Jonas Thörnblad 2025-01-17 15:30:36 +01:00
  • 4239b74328
         Add new USB debug pipe (TKEYCTRL). Jonas Thörnblad 2025-01-15 15:08:18 +01:00
  • a5ed3cfaa9
         Build: Don't depend on uds.hex and udi.hex Michael Cardell Widerkrantz 2025-01-20 14:48:53 +01:00
  • c1c0ac35f4
         Fix off-by-one UART bitrate counter value that will make the RX sampling and TX sending drift. The impact gets higher as the baudrate increases and the bitrate counter value gets smaller. Jonas Thörnblad 2024-12-16 13:05:36 +01:00
  • c4eda3ff8e
         Update clock frequency to 24 MHz and UART baudrate to 500000. Jonas Thörnblad 2025-01-09 15:15:16 +01:00
  • 3ccdf8fc0f
         Add incoming and outgoing CTS (Clear To Send) signals for the CH552 Jonas Thörnblad 2024-12-17 17:33:14 +01:00
  • aaec7bbc3e
         Add incoming and outgoing CTS (Clear To Send) signals for the FPGA to let the CH552 and FPGA signal each other that it is OK to send UART data. The CTS signals indicate "OK to send" if high. If an incoming CTS signal goes low, the receiver of that signal should immediatly stop sending UART data. Jonas Thörnblad 2024-12-17 17:18:45 +01:00
  • 0213d64039
         FPGA: Increase UART baud rate to 500k Mikael Ågren 2024-10-09 09:45:29 +02:00
  • 7862ad4415
         fw: Minimal CDC implementation of new framing protocol Mikael Ågren 2024-09-16 14:26:12 +02:00
  • f1b19cb56e
         Wrap accesses to UART output buffers Mikael Ågren 2024-09-17 13:36:39 +02:00
  • 25716a7c69
         WIP: Add USB HID and framing support over UART Jonas Thörnblad 2024-07-04 18:24:07 +02:00
  • 28c81a17f7
         Move usb_strings.h for ch552_fw to the include directory Jonas Thörnblad 2024-07-04 18:19:02 +02:00
  • f2a3d8b23c
         Add complete checks for invalid memory accesses Jonas Thörnblad 2024-12-20 10:38:17 +01:00
  • e7531dab7c
         Add complete checks for invalid memory accesses mem_access Jonas Thörnblad 2024-12-20 10:38:17 +01:00
  • 8eade9933c
         Add incoming and outgoing CTS (Clear To Send) signals for the CH552 ch552_hid_cdc Jonas Thörnblad 2024-12-17 17:33:14 +01:00
  • 48cbb55d6e
         Add incoming and outgoing CTS (Clear To Send) signals for the FPGA to let the CH552 and FPGA signal each other that it is OK to send UART data. The CTS signals indicate "OK to send" if high. If an incoming CTS signal goes low, the receiver of that signal should immediatly stop sending UART data. Jonas Thörnblad 2024-12-17 17:18:45 +01:00
  • 3389d7ebf3
         Fix off-by-one UART bitrate counter value that will make the RX sampling and TX sending drift. The impact gets higher as the baudrate increases and the bitrate counter value gets smaller. uart_fix Jonas Thörnblad 2024-12-16 13:05:36 +01:00
  • 5d138ef45b
         FPGA: Increase UART baud rate to 500k Mikael Ågren 2024-10-09 09:45:29 +02:00
  • d2a9100412
         fw: Minimal CDC implementation of new framing protocol Mikael Ågren 2024-09-16 14:26:12 +02:00
  • 8c7059155f
         Wrap accesses to UART output buffers Mikael Ågren 2024-09-17 13:36:39 +02:00
  • a0910e25c3
         WIP: Add USB HID and framing support over UART Jonas Thörnblad 2024-07-04 18:24:07 +02:00
  • f6c0501db9
         Move usb_strings.h for ch552_fw to the include directory Jonas Thörnblad 2024-07-04 18:19:02 +02:00
  • 66888a3756
         tb: Make uart selftesting Daniel Jobson 2024-11-21 15:32:26 +01:00
  • c637c745cc
         tb: Make trng selftesting Daniel Jobson 2024-11-21 15:28:20 +01:00
  • ac853c87ec
         tb: Make touch_sense selftesting Daniel Jobson 2024-11-21 15:23:39 +01:00
  • c547042553
         tb: Make tb_tk1_spi_master.v selftesting Daniel Jobson 2024-11-21 15:07:27 +01:00
  • c7e44d3575
         Update tk1/README and fpga README regarding system mode Daniel Jobson 2024-11-21 13:24:04 +01:00
  • 04eefe01fa
         Fix tb_tk1.v tests broken when implementing hw controlled system mode Mikael Ågren 2024-11-21 08:46:49 +01:00
  • 2abe93cf06
         Make sensitive assets only readable/writable before system_mode is set Daniel Jobson 2024-11-15 11:19:40 +01:00
  • 09c3d9b58e
         tb: Make tb_tk1.v selftesting Daniel Jobson 2024-11-21 14:21:36 +01:00
  • 690bb53267
         Introduce new bit to mark ROM as non-executable Daniel Jobson 2024-11-15 09:28:01 +01:00
  • 9062b49804
         Deny access to the SPI master in app mode Daniel Jobson 2024-11-13 16:13:16 +01:00
  • 8c6ab6902d
         Automatically control system_mode in hardware Daniel Jobson 2024-11-14 14:02:53 +01:00
  • 31708a39d3
         Add API for syscall Daniel Jobson 2024-11-07 13:10:10 +01:00
  • 8c073c3d01
         fw: adapt fw syscall to hw syscall implementation Daniel Jobson 2024-11-13 15:55:29 +01:00
  • a65eddbb00
         temp: add define to toggle the use of fw RAM Daniel Jobson 2024-11-11 12:39:36 +01:00
  • a57178f9d9
         fw: add workaround so objdump can disassemble compressed rv32 instructions Daniel Jobson 2024-10-16 16:02:54 +02:00
  • e21961ca0d
         fw: simplify switch to FW_RAM Daniel Jobson 2024-10-16 16:02:27 +02:00
  • 027978f4d4
         fw: switch to FW RAM when executing a syscall. Daniel Jobson 2024-10-04 13:11:33 +02:00
  • 290f826e76
         storage: add erase command Daniel Jobson 2024-09-30 14:16:02 +02:00
  • 6ac874584d
         Optimize SPI functions, lowering ROM usage by 70 bytes. Daniel Jobson 2024-09-30 11:29:08 +02:00
  • 9fabff90cb
         Increase ROM to 8K Daniel Jobson 2024-09-19 08:57:17 +02:00
  • e046b7ad0f
         Implement preload_store Daniel Jobson 2024-09-19 08:52:42 +02:00
  • c300718c9c
         Temporarily override the blake2s trampoline Daniel Jobson 2024-09-17 14:54:57 +02:00
  • d22d9b8392
         Wip syscall function. Daniel Jobson 2024-09-17 14:54:19 +02:00
  • 150cf2977f
         WIP app storage calls Daniel Jobson 2024-09-12 15:43:38 +02:00
  • 07dec8b8dc
         Add make target for testbench simulation and simulation firmware. Jonas Thörnblad 2024-11-25 16:57:59 +01:00
  • ede92af2c1
         Updated application_fpga_verilator.cc to match module application_fpga_sim. Jonas Thörnblad 2024-11-25 16:54:48 +01:00
  • 48c9709164
         Set APP_SIZE if not defined. Jonas Thörnblad 2024-11-25 16:52:26 +01:00
  • a99e69f33e
         Remove non-working make targets for "post-synthesis functional simulation" and "post-place and route functional simulation". Jonas Thörnblad 2024-11-25 15:49:19 +01:00
  • 15ce2c438b
         Add needed changes to firmware for simulation. Jonas Thörnblad 2024-11-25 15:37:19 +01:00
  • fe9055ea23
         Add script to split app into simulation ram Jonas Thörnblad 2024-11-25 15:28:13 +01:00
  • 3cd902f792
         Add top level testbench for application_fpga_sim.v Jonas Thörnblad 2024-11-25 15:16:42 +01:00
  • 4260e1d5ac
         Update application_fpga_sim.v to match application_fpga.v Jonas Thörnblad 2024-11-25 15:15:01 +01:00
  • a330aa15ec
         Add verilog file for TRNG simulation Jonas Thörnblad 2024-11-25 15:11:32 +01:00
  • d3b9660180
         Align module name with its file name. Jonas Thörnblad 2024-11-25 15:01:34 +01:00
  • e54045a4dd
         Add APP_SIZE parameter to tk1 block to set size of application when simulating. Jonas Thörnblad 2024-11-25 14:58:17 +01:00
  • 5b49d80891
         tb: make timer core testbench selftesting Daniel Jobson 2024-11-22 13:40:43 +01:00
  • c735c6fdde
         tb: make tb_timer.v selftesting Daniel Jobson 2024-11-22 13:21:25 +01:00
  • 6bdedf4f86
         Fix bug in timer core, where it misses clock cycles Daniel Jobson 2024-11-22 13:03:45 +01:00
  • 3d7a97ecbc
         fpga: remove the API for configuring the UART core Daniel Jobson 2024-11-11 14:15:54 +01:00
  • 0445c8f993
         Add nextpnr flag '--exit-on-failed-target-frequency' Jonas Thörnblad 2024-11-22 14:36:38 +01:00
  • 08a204dfa6
         Minimize number of Dockerfile RUN commands to lower number of used layers in the image. Too many layers will give an error. Jonas Thörnblad 2024-11-22 14:24:32 +01:00