mirror of
https://github.com/tillitis/tillitis-key1.git
synced 2025-04-17 14:03:11 -04:00
Optimize SPI functions, lowering ROM usage by 70 bytes.
- Have only one transfer function, to minimize duplicate code. - Remove address assignments that does not make a difference.
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9fabff90cb
commit
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@ -17,7 +17,7 @@ static volatile uint32_t *timer_ctrl = (volatile uint32_t *)TK1_MMIO_TIMER_CTRL
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// clang-format on
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// CPU clock frequency in Hz
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#define CPUFREQ 18000000
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#define CPUFREQ 21000000
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#define PAGE_SIZE 256
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static void delay(int timeout_ms)
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@ -40,7 +40,7 @@ bool flash_is_busy(void)
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uint8_t tx_buf = READ_STATUS_REG_1;
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uint8_t rx_buf = {0x00};
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spi_transfer(&tx_buf, sizeof(tx_buf), &rx_buf, sizeof(rx_buf));
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spi_transfer(&tx_buf, sizeof(tx_buf), NULL, 0, &rx_buf, sizeof(rx_buf));
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if (rx_buf & (1 << STATUS_REG_BUSY_BIT)) {
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return true;
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@ -61,14 +61,14 @@ void flash_write_enable(void)
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{
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uint8_t tx_buf = WRITE_ENABLE;
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spi_write(&tx_buf, sizeof(tx_buf), NULL, 0);
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spi_transfer(&tx_buf, sizeof(tx_buf), NULL, 0, NULL, 0);
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}
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void flash_write_disable(void)
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{
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uint8_t tx_buf = WRITE_DISABLE;
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spi_write(&tx_buf, sizeof(tx_buf), NULL, 0);
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spi_transfer(&tx_buf, sizeof(tx_buf), NULL, 0, NULL, 0);
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}
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void flash_sector_erase(uint32_t address)
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@ -77,10 +77,10 @@ void flash_sector_erase(uint32_t address)
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tx_buf[0] = SECTOR_ERASE;
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tx_buf[1] = (address >> ADDR_BYTE_3_BIT) & 0xFF;
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tx_buf[2] = (address >> ADDR_BYTE_2_BIT) & 0xFF;
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tx_buf[3] = (address >> ADDR_BYTE_1_BIT) & 0xFF;
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/* tx_buf[3] is within a sector, and hence does not make a difference */
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flash_write_enable();
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spi_write(tx_buf, sizeof(tx_buf), NULL, 0);
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spi_transfer(tx_buf, sizeof(tx_buf), NULL, 0, NULL, 0);
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flash_wait_busy();
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}
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@ -93,20 +93,21 @@ void flash_block_32_erase(uint32_t address)
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tx_buf[3] = (address >> ADDR_BYTE_1_BIT) & 0xFF;
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flash_write_enable();
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spi_write(tx_buf, sizeof(tx_buf), NULL, 0);
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spi_transfer(tx_buf, sizeof(tx_buf), NULL, 0, NULL, 0);
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flash_wait_busy();
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}
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// 64 KiB block erase, only cares about address bits 16 and above.
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void flash_block_64_erase(uint32_t address)
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{
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uint8_t tx_buf[4] = {0x00};
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tx_buf[0] = BLOCK_ERASE_64K;
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tx_buf[1] = (address >> ADDR_BYTE_3_BIT) & 0xFF;
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tx_buf[2] = (address >> ADDR_BYTE_2_BIT) & 0xFF;
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tx_buf[3] = (address >> ADDR_BYTE_1_BIT) & 0xFF;
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/* tx_buf[2] and tx_buf[3] is within a block, and hence does not make a
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* difference */
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flash_write_enable();
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spi_write(tx_buf, sizeof(tx_buf), NULL, 0);
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spi_transfer(tx_buf, sizeof(tx_buf), NULL, 0, NULL, 0);
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flash_wait_busy();
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}
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@ -115,14 +116,14 @@ void flash_release_powerdown(void)
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uint8_t tx_buf[4] = {0x00};
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tx_buf[0] = RELEASE_POWER_DOWN;
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spi_write(tx_buf, sizeof(tx_buf), NULL, 0);
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spi_transfer(tx_buf, sizeof(tx_buf), NULL, 0, NULL, 0);
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}
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void flash_powerdown(void)
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{
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uint8_t tx_buf = POWER_DOWN;
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spi_write(&tx_buf, sizeof(tx_buf), NULL, 0);
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spi_transfer(&tx_buf, sizeof(tx_buf), NULL, 0, NULL, 0);
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}
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void flash_read_manufacturer_device_id(uint8_t *device_id)
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@ -130,14 +131,14 @@ void flash_read_manufacturer_device_id(uint8_t *device_id)
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uint8_t tx_buf[4] = {0x00};
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tx_buf[0] = READ_MANUFACTURER_ID;
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spi_transfer(tx_buf, sizeof(tx_buf), device_id, 2);
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spi_transfer(tx_buf, sizeof(tx_buf), NULL, 0, device_id, 2);
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}
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void flash_read_jedec_id(uint8_t *jedec_id)
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{
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uint8_t tx_buf = READ_JEDEC_ID;
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spi_transfer(&tx_buf, sizeof(tx_buf), jedec_id, 3);
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spi_transfer(&tx_buf, sizeof(tx_buf), NULL, 0, jedec_id, 3);
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}
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void flash_read_unique_id(uint8_t *unique_id)
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@ -145,17 +146,17 @@ void flash_read_unique_id(uint8_t *unique_id)
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uint8_t tx_buf[5] = {0x00};
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tx_buf[0] = READ_UNIQUE_ID;
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spi_transfer(tx_buf, sizeof(tx_buf), unique_id, 8);
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spi_transfer(tx_buf, sizeof(tx_buf), NULL, 0, unique_id, 8);
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}
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void flash_read_status(uint8_t *status_reg)
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{
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uint8_t tx_buf = READ_STATUS_REG_1;
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spi_transfer(&tx_buf, sizeof(tx_buf), status_reg, 1);
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spi_transfer(&tx_buf, sizeof(tx_buf), NULL, 0, status_reg, 1);
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tx_buf = READ_STATUS_REG_2;
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spi_transfer(&tx_buf, sizeof(tx_buf), status_reg + 1, 1);
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spi_transfer(&tx_buf, sizeof(tx_buf), NULL, 0, status_reg + 1, 1);
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}
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int flash_read_data(uint32_t address, uint8_t *dest_buf, size_t size)
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@ -166,7 +167,7 @@ int flash_read_data(uint32_t address, uint8_t *dest_buf, size_t size)
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tx_buf[2] = (address >> ADDR_BYTE_2_BIT) & 0xFF;
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tx_buf[3] = (address >> ADDR_BYTE_1_BIT) & 0xFF;
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return spi_transfer(tx_buf, sizeof(tx_buf), dest_buf, size);
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return spi_transfer(tx_buf, sizeof(tx_buf), NULL, 0, dest_buf, size);
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}
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// Only handles writes where the least significant byte of the start address is
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@ -197,7 +198,8 @@ int flash_write_data(uint32_t address, uint8_t *data, size_t size)
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flash_write_enable();
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if (spi_write(tx_buf, sizeof(tx_buf), p_data, n_bytes) != 0) {
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if (spi_transfer(tx_buf, sizeof(tx_buf), p_data, n_bytes, NULL,
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0) != 0) {
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return -1;
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}
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@ -64,7 +64,10 @@ static void _spi_read(uint8_t *buf, size_t size)
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}
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}
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int spi_write(uint8_t *cmd, size_t cmd_size, uint8_t *data, size_t data_size)
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// Function to both read and write data to the connected SPI flash.
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int spi_transfer(uint8_t *cmd, size_t cmd_size, uint8_t *tx_buf, size_t tx_size,
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uint8_t *rx_buf, size_t rx_size)
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{
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if (cmd == NULL || cmd_size == 0) {
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return -1;
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@ -74,26 +77,10 @@ int spi_write(uint8_t *cmd, size_t cmd_size, uint8_t *data, size_t data_size)
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_spi_write(cmd, cmd_size);
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if (data != NULL && data_size != 0) {
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_spi_write(data, data_size);
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if (tx_buf != NULL || tx_size != 0) {
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_spi_write(tx_buf, tx_size);
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}
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spi_disable();
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return 0;
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}
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int spi_transfer(uint8_t *tx_buf, size_t tx_size, uint8_t *rx_buf,
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size_t rx_size)
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{
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if (tx_buf == NULL || tx_size == 0) {
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return -1;
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}
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spi_enable();
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_spi_write(tx_buf, tx_size);
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if (rx_buf != NULL && rx_size != 0) {
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_spi_read(rx_buf, rx_size);
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}
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@ -8,8 +8,7 @@
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#include <stdint.h>
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int spi_ready(void);
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int spi_write(uint8_t *cmd, size_t size_cmd, uint8_t *data, size_t size_data);
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int spi_transfer(uint8_t *tx_buf, size_t tx_size, uint8_t *rx_buf,
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size_t rx_size);
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int spi_transfer(uint8_t *cmd, size_t cmd_size, uint8_t *tx_buf, size_t tx_size,
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uint8_t *rx_buf, size_t rx_size);
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#endif
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