Commit Graph

57 Commits

Author SHA1 Message Date
Daniel Jobson
f62930984d
WIP app storage calls 2024-09-23 15:42:23 +02:00
Daniel Jobson
0669df4c27
WIP management app 2024-09-23 15:42:23 +02:00
Daniel Jobson
0abfdf592b
fw: break out trng and xorwow to rng.[ch] 2024-09-23 15:42:23 +02:00
Daniel Jobson
54b8b1cc4e
fw: Break out htif functions for qemu to separate files 2024-09-23 15:42:18 +02:00
Daniel Jobson
0bec032db3
temp commit: Expose write functions to make development easier 2024-09-23 15:37:14 +02:00
Daniel Jobson
b52e57d4ea
WIP auth app 2024-09-23 15:37:14 +02:00
Daniel Jobson
af7df7c9e8
WIP preload_app 2024-09-23 15:37:13 +02:00
Daniel Jobson
c3baad9a23
WIP partition table 2024-09-23 15:37:13 +02:00
Daniel Jobson
a5c2d05cb1
Import spi.[ch] and flash.[ch] 2024-09-23 15:37:13 +02:00
Daniel Jobson
698b2796ee
Remove types.h in favor of standard libs such as stdint, stddef 2024-09-23 15:37:13 +02:00
Daniel Jobson
613316f53e
fw: simplify how to enable QEMU debug in firmware.
- Remove the define `NOCONSOLE`, add define `QEMU_CONSOLE`
- Inverse the use of it, add the define to have QEMU debug output in fw.
- Add a make target `qemu_firmware.elf` which builds the firmware with
  QEMU console enabled.

Co-authored-by: Mikael Ågren <mikael@tillitis.se>
2024-09-19 16:51:55 +02:00
Joachim Strömbergson
d1cff273d7
FPGA: Move all sub modules into separate cores
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2024-08-29 16:06:58 +02:00
Jonas Thörnblad
b8f22a9810
Log stdout/stderr from yosys and nextpnr-ice40 2024-08-28 14:12:10 +02:00
Joachim Strömbergson
7f93b7817b
FPGA: Add --freq constraint to nextpnr
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2024-08-20 13:45:01 +02:00
dehanj
120956b835
CI: Enable linting in CI again. See #182. 2024-06-17 15:37:13 +02:00
Joachim Strömbergson
d502b59062
FPGA: Ignore combinational loops that we want
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2024-06-17 15:37:13 +02:00
Joachim Strömbergson
49e81be1e1
FPGA: Ignore lint warnings in cell library
For Verilator >5.019 `-Wno-GENUNNAMED` needs to be added to LINT_FLAGS
to silence warnings from the cell library.

Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2024-06-17 15:37:13 +02:00
Joachim Strömbergson
3bc2453287
A construction of a minimal SPI master.
- NOTE: This is an optional feature, not built by default. Not included
  in the tk1 for sale at Tillitis shop.
- This makes it possible to interface the SPI flash onboard TKey.
- To include the SPI master in the build, use `make application_fpga.bin
  YOSYS_FLAG=-DINCLUDE_SPI_MASTER`.

Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2024-06-11 15:28:29 +02:00
dehanj
c85b5311cd
Change filename personalize.py to patch_uds_udi.py
Also adding a more detailed explaination of what the script intends to
do
2024-03-26 13:07:11 +01:00
Michael Cardell Widerkrantz
b0efcf019e
Include static analysis in CI
- Exclude splint from CI, so we make another target for it "splint",
  which we might include in the "check" target later.

- Move the analysis runs earlier in CI so they, including indentation
  checks, fail first.

- Include printouts of hashen in check-binary-hashes to easier see
  what the digest are if it fails in CI.
2024-03-22 11:03:13 +01:00
dehanj
8ca4241ade
Disable non-zero exit for verilog linter in CI, see issue 182. 2024-03-20 16:39:53 +01:00
Joachim Strömbergson
8731908cb1
Support incremental builds for the bitstream.
By patching the UDS and UDI into an already built bitstream, it is now
not necessary to rebuild the entire build flow when changing the UDS
and the UDI. This lowers re-build times significantly.

Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2024-03-20 16:39:45 +01:00
Michael Cardell Widerkrantz
0590445f3d
Add testbench targets on top-level
The testbenches live in their own Makefiles under
hw/application_fpga/core/*/toolruns (except picorv32). Let's add a
top-level target to build and run them.

In order to run core testbenches, use

  cd hw/application_fpga
  make tb

or if using Podman:

  cd contrib
  make run-tb

to run the same target in a container.
2024-03-20 13:47:12 +01:00
dehanj
1e34ddcfa6
Update linter to Verilog-2005 2024-03-19 10:45:37 +01:00
Michael Cardell Widerkrantz
746d7f0e0d
Use pedantic warnings
Use pedantic warnings but still allow inline assembly, so turn off
language-extension-token warnings.
2024-03-19 09:25:37 +01:00
Daniel Lublin
7cd085a17e
Avoid confusing errors by checking for programmer and stick first
Signed-off-by: Daniel Lublin <daniel@lublin.se>
2023-08-30 11:37:03 +02:00
Joachim Strömbergson
022bf0bbf9
Change name of pin constraint file to match tk1 pcb
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2023-07-04 09:04:29 +02:00
Michael Cardell Widerkrantz
e0e871c730
Include debug symbols in the ELF 2023-07-04 09:04:23 +02:00
Daniel Lublin
2ddd523c29
Use tkey-builder:2; add hashes & checks for bitstream & fw bins
Signed-off-by: Daniel Lublin <daniel@lublin.se>
2023-07-04 09:04:23 +02:00
Michael Cardell Widerkrantz
c443ef8a3e
fw: clang-tidy and splint: New make target: check
Add clang-tidy and splint static analytics check. For now, we use only
the cert-* warnings on clang-tidy and run splint with a lot of flags
to allow more things.

Changes to silence these analytics:

- Stop returning stuff from our debug print functions. We don't check
  them anyway and we don't have any way of detecting transmission
  failure.

- Declare more things static that isn't used outside of a file.

- Change types to be more consistent, typically to size_t or
  something or to uint32_t.
2023-03-22 11:05:32 +01:00
Daniel Lublin
7a97f1ee5f
Add more complete fw_ram test; let testfw have stack in RAM
Signed-off-by: Daniel Lublin <daniel@lublin.se>
2023-03-14 11:21:47 +01:00
Daniel Lublin
5fe7ba7f9d
fw: optimize for speed (-O2) instead of size (-Os)
Signed-off-by: Daniel Lublin <daniel@lublin.se>
2023-03-14 10:25:05 +01:00
Daniel Lublin
3ddd6e83a3
Refuse to produce a .bin if .elf has non-empty data or bss section
Signed-off-by: Daniel Lublin <daniel@lublin.se>
2023-03-14 10:25:02 +01:00
Michael Cardell Widerkrantz
bbbe1e2f31
fw: Move LED defines and function to own files
Signed-off-by: Daniel Lublin <daniel@lublin.se>
2023-03-14 10:25:01 +01:00
Michael Cardell Widerkrantz
ccc3b16569
fw: Safer memory functions + asserts
Introduce memcpy_s() and wordcpy_s() that takes the destination buffer
size as an argument. Use assert() which aborts our program to an
eternal loop if we hit problems.

Sprinkle asserts elsewhere as well.

Signed-off-by: Daniel Lublin <daniel@lublin.se>
2023-03-14 10:25:01 +01:00
Daniel Lublin
c9593f11c8 Config verilator lint to ignore known 3rd-party warnings; let warnings be fatal
Signed-off-by: Daniel Lublin <daniel@lublin.se>
2023-03-01 13:37:31 +01:00
Michael Cardell Widerkrantz
08e1438d1e
fw: Add support for blake2s MMIO
In firmware we store the address to firmware blake2s() function at
TK1_MMIO_TK1_BLAKE2S so app can use this firmware function sort of
like a system call but without context switch.
2022-12-15 12:59:52 +01:00
Daniel Lublin
49d4735f17
Use TKey name
Signed-off-by: Daniel Lublin <daniel@lublin.se>
2022-12-02 08:03:06 +01:00
Daniel Lublin
f87e12d1bb
Build with zmmul extension (require clang 15)
Signed-off-by: Daniel Lublin <daniel@lublin.se>
2022-11-29 13:03:06 +01:00
Daniel Lublin
3435941eab
Remove version suffixes, no longer needed on ubuntu 22.10 (clang 15)
Signed-off-by: Daniel Lublin <daniel@lublin.se>
2022-11-23 09:47:48 +01:00
Daniel Lublin
4b4f014d38
Rename to TK1 2022-10-26 09:20:02 +02:00
Michael Cardell Widerkrantz
b8f1d4a083
Add make target secret, update quickstart 2022-10-20 17:02:56 +02:00
Joachim Strömbergson
51a22dc32c Merge branch 'fw_ram' 2022-10-13 13:16:53 +02:00
Joachim Strömbergson
b37b377a7e
Change optimization to Os since we want compact code 2022-10-13 09:26:49 +02:00
Joachim Strömbergson
192ce47fce
Fix #18 with incorrect clock frequency in analysis 2022-10-12 10:25:37 +02:00
Daniel Lublin
200ef26f36
Correct 2022-10-11 20:46:21 +02:00
Daniel Lublin
4d927ce426
Fix size_mismatch for testfw 2022-10-11 17:25:19 +02:00
Daniel Lublin
96746b2de0
Clarify BRAM_FW_SIZE 2022-10-11 17:25:00 +02:00
Joachim Strömbergson
a51619e5b7
Add fw_ram module 2022-10-11 16:58:26 +02:00
Joachim Strömbergson
7e0692b150
Replace FiGaRO based TRNG with new ROSC based TRNG 2022-10-11 13:17:04 +02:00