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2 commits

Author SHA1 Message Date
Jonas Thörnblad
d3b9660180
Align module name with its file name. 2024-11-28 16:09:59 +01:00
Jonas Thörnblad
330146ba3a
Rename top level simulation files 
* Rename application_fpga_vsim.v and reset_gen_vsim.v to
  application_fpga_sim.v and reset_gen_sim.v
* Update Makefile
* Fix a typo
 2024-11-12 15:33:33 +01:00
Renamed from hw/application_fpga/tb/reset_gen_vsim.v (Browse further)