Commit Graph

80 Commits

Author SHA1 Message Date
Daniel Lublin
a2ffb6d007
Correct reference 2022-11-15 15:19:45 +01:00
Daniel Lublin
a14662c622
Change to max 100 KB app with 28 KB stack 2022-11-02 15:52:29 +01:00
Daniel Lublin
8755a65a38
Format code 2022-10-31 10:07:23 +01:00
Daniel Lublin
85ef93cd3c
Clarify switch_app reads and writes; add read test to testfw 2022-10-26 11:38:58 +02:00
Daniel Lublin
4b4f014d38
Rename to TK1 2022-10-26 09:20:02 +02:00
Daniel Lublin
db8f9cf881
Document SRAM==SPRAM; fix whitespace 2022-10-24 11:58:54 +02:00
Michael Cardell Widerkrantz
490571b6c0
Clear all RAM during start
Since SRAM has some data remanence even without power it seems good
hygien to clear all RAM when starting the device so as not to leak
potential sensitive data between device apps.
2022-10-24 11:52:52 +02:00
Daniel Lublin
65f2272a45
Add TRNG to testfw, document 2022-10-20 12:05:19 +02:00
Michael Cardell Widerkrantz
c52f7d52cd
testfw: Add timer tests 2022-10-20 11:34:01 +02:00
Michael Cardell Widerkrantz
cbe6d3db8d
Use the new firmware-only RAM for CDI computation
To protect UDS we use a special firmware-only RAM for both the in
parameter to the blake2s() function and for the blake2s_ctx.
2022-10-18 14:51:30 +02:00
Michael Cardell Widerkrantz
6d08a82c05
Pass the blake2s_ctx to blake2s() as arg
Instead of allocating the blake2s_ctx in the blake2s() function we
pass it as a pointer as an argument to be able to better control where
the variable is in memory.
2022-10-18 14:51:26 +02:00
Daniel Lublin
7129205cb0
Add fw_ram size to mem-include 2022-10-17 11:38:04 +02:00
Daniel Lublin
69c3f77e5e
testfw: tidy, clean-up, fmt 2022-10-17 11:15:26 +02:00
Joachim Strömbergson
f6046d55a9
Change ADDR_CTRL to be a pulsed start_stop signal 2022-10-14 08:50:30 +02:00
Joachim Strömbergson
2be934ee22
Restore start and stop bits, but clarify in documenation 2022-10-13 16:10:08 +02:00
Joachim Strömbergson
00d180d34e
Change to a single run bit and update access control 2022-10-13 14:58:39 +02:00
Joachim Strömbergson
5e5550461f
Removing confusing negation in message 2022-10-13 13:56:12 +02:00
Joachim Strömbergson
1b03459ab3
Remove app-accessible debug register from mta1 core 2022-10-13 13:51:19 +02:00
Joachim Strömbergson
51a22dc32c Merge branch 'fw_ram' 2022-10-13 13:16:53 +02:00
Joachim Strömbergson
1f2a585aba
Add test case for fw_ram 2022-10-13 13:16:11 +02:00
Daniel Lublin
55c5081486
Adjust and document the firmware state-machine, including USS
In particular, order of LOAD_USS and LOAD_APP_SIZE is not required, but
the need to send both is documented. This is followed up with adjustment
in the host programs' Go code, to try to reinforce this. LoadApp() will
take the secretPhrase parameter (to be hashed as USS), and loadUSS()
will be unexported.

Correct CMD/RSP lengths in pseudo-code.
2022-10-12 15:12:07 +02:00
Joachim Strömbergson
a51619e5b7
Add fw_ram module 2022-10-11 16:58:26 +02:00
Joachim Strömbergson
7e0692b150
Replace FiGaRO based TRNG with new ROSC based TRNG 2022-10-11 13:17:04 +02:00
Joachim Strömbergson
87dab3fe6d
Remove name, version addresses for cores 2022-10-11 09:55:56 +02:00
Daniel Lublin
0d16dd5959
Adjust flashing after frequency bump 2022-10-03 08:06:29 +02:00
Daniel Lublin
3f61182a88
Doc how qemu needs to be built; nits 2022-09-30 11:34:09 +02:00
Daniel Lublin
99efb78ed8
Receive USS and hash into CDI
- We're OK with USS not being loaded, and use an all-zero USS if so.
- We require USS to be loaded before app_size (if at all).
2022-09-29 14:58:23 +02:00
Daniel Lublin
df67966d8f
Be consistent and check for errors first 2022-09-28 10:34:48 +02:00
Daniel Lublin
8066c1092e
Make fmt output changes that will be made 2022-09-21 10:13:39 +02:00
Joachim Strömbergson
715de60f4a Make initial public release 2022-09-19 08:51:11 +02:00