5 Commits

Author SHA1 Message Date
Mikael Ågren
4877e0ab99
PoC: Add example firmware with embedded that calls syscalls implemented in C
App is embedded in firmware and is loaded into app RAM when firmware
starts.
App continuously calls SET_LED syscalls.

Simulation: `make tb_application_fpga_irqpoc_c_example`
2025-02-07 12:54:01 +01:00
Mikael Ågren
62dba7c4fe
PoC: Control access to FW RAM
Allow FW RAM access only in the following execution contexts:
- Firmware mode
- IRQ_SYSCALL_HI

Input port `system_mode` of the `fw_ram` module is replaced with an
enable port. Since access to FW RAM not longer depend only on
system_mode
2025-02-07 12:54:01 +01:00
Mikael Ågren
a871d23d5d
PoC: Add basic syscall example firmware
Adds a basic example firmware that copies an app to app RAM. The app
triggers syscall interrupts and tries to execute ROM code from app mode.

A make target (`tb_application_fpga_irqpoc_with_app`) that simulates a
Tkey running the firmware is added.
2025-02-07 12:54:01 +01:00
Mikael Ågren
5535323b06
PoC: PicoRV32 interrupts
A proof-of-concept of enabling PicoRV32 interrupts. Two interrupt
sources, which can be triggered by writes to memory addresses, are
added.  The design has only been simulated, not run on hardware.

Synthesis:

Ice40 LC utilization is 93% (4934/5280) when built using tkey-builder:4

Simulation:

A `tb_application_fpga_irqpoc` target is added. Running `make
tb_application_fpga_irqpoc` creates `tb_application_fpga_sim.fst` which
can be inspected in GTKWave or Surfer.

Firmware:

A simple firmware is added in `fw/irqpoc`. It enables both interrupts
and triggers each interrupt once.

Custom PicoRV32 instructions are located in `custom_ops.S`. It is
imported from upstream PicoRV32 commit:
70f3c33ac8
2025-02-04 12:25:57 +01:00
Jonas Thörnblad
3cd902f792
Add top level testbench for application_fpga_sim.v 2024-11-28 16:10:00 +01:00