Commit Graph

9 Commits

Author SHA1 Message Date
Daniel Lublin
7129205cb0
Add fw_ram size to mem-include 2022-10-17 11:38:04 +02:00
Joachim Strömbergson
f6046d55a9
Change ADDR_CTRL to be a pulsed start_stop signal 2022-10-14 08:50:30 +02:00
Joachim Strömbergson
2be934ee22
Restore start and stop bits, but clarify in documenation 2022-10-13 16:10:08 +02:00
Joachim Strömbergson
00d180d34e
Change to a single run bit and update access control 2022-10-13 14:58:39 +02:00
Joachim Strömbergson
1b03459ab3
Remove app-accessible debug register from mta1 core 2022-10-13 13:51:19 +02:00
Joachim Strömbergson
a51619e5b7
Add fw_ram module 2022-10-11 16:58:26 +02:00
Joachim Strömbergson
7e0692b150
Replace FiGaRO based TRNG with new ROSC based TRNG 2022-10-11 13:17:04 +02:00
Joachim Strömbergson
87dab3fe6d
Remove name, version addresses for cores 2022-10-11 09:55:56 +02:00
Joachim Strömbergson
715de60f4a Make initial public release 2022-09-19 08:51:11 +02:00