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Author SHA1 Message Date
Jared Boone
2c778b72e2 Wrong S3 region. 2015-09-01 15:15:24 -07:00
Jared Boone
72a59c3dae Fix cwd when uploading release files. 2015-09-01 15:07:31 -07:00
Jared Boone
a06ee31566 Make release and post on S3. 2015-09-01 14:53:40 -07:00
Jared Boone
57ec7aac41 Remove container stuff. 2015-09-01 14:53:40 -07:00
Jared Boone
340fc4dd83 Override compilers. 2015-09-01 14:53:40 -07:00
Jared Boone
61d765aeac before_install vs. before_script? No idea... 2015-09-01 14:53:40 -07:00
Jared Boone
e96895d18c Container's not flexible enough, back to the old approach. 2015-09-01 14:53:40 -07:00
Jared Boone
e0c313b240 Switch to shiny container. 2015-09-01 14:53:40 -07:00
Jared Boone
8b465a593e Whitespace, huh? OK... 2015-09-01 14:53:40 -07:00
Jared Boone
0f39d52f48 More Travis CI stumbling. 2015-09-01 14:53:39 -07:00
Jared Boone
92674706ed Oops, bad Travis CI .yml syntax. 2015-09-01 14:53:39 -07:00
Jared Boone
0fd2dcf04a Experimenting with Travis CI for firmware builds. 2015-09-01 14:53:39 -07:00
Jared Boone
4846557f12 Missed spots when renaming REVISION to GIT_REVISION. 2015-09-01 14:21:40 -07:00
Jared Boone
5d8c636f40 Halt M4 right after sending M0 the shutdown message. 
Addresses issue #55.
 2015-09-01 13:49:09 -07:00
Jared Boone
805442d46f Allow KiCad to update metadata. 2015-09-01 11:10:50 -07:00
Jared Boone
d9568f7f47 Update date code to 20150901. 2015-09-01 11:09:19 -07:00
Jared Boone
1c2b3b82ce Update layers exported during PCB plot. 2015-09-01 10:17:30 -07:00
Jared Boone
73e9dabf72 Change default layer visibility. 2015-09-01 10:14:36 -07:00
Jared Boone
f3f5a9647b Board stack-up drawing clean-up. 2015-09-01 10:13:51 -07:00
Jared Boone
e979b9b64d Change drawing lines width to 0.1mm. 2015-09-01 10:02:07 -07:00
Jared Boone
968ec6d176 Change PCB stack-up for vendor. 2015-09-01 10:01:39 -07:00
Jared Boone
128dda23bb Note about separate PTH and NPTH drill files. 2015-08-30 17:23:53 -07:00
Jared Boone
85f9b4cdc5 Add default dimension units note. 2015-08-30 17:18:14 -07:00
Jared Boone
c5cd3a4498 Add title block with copyright, license. 2015-08-30 17:12:32 -07:00
Jared Boone
d2436ca229 Add notes block. 2015-08-30 17:11:59 -07:00
Jared Boone
18b272bcab Add PCB dimensions 2015-08-30 16:24:07 -07:00
Jared Boone
d3acd79df8 Add PCB stack data and diagram. 2015-08-30 16:23:55 -07:00
Jared Boone
375cf6f238 Tighten solder mask around LCD connector. 
Shooting for 4mil mask web between pads.
 2015-08-30 14:35:04 -07:00
Jared Boone
84b92365f9 Move and shrink copper layer legend. 
Doesn't need to be visible after assembly. I think.
 2015-08-30 10:14:36 -07:00
Jared Boone
ea2cfb7ad2 Center text in layer legend. 2015-08-30 09:42:47 -07:00
Jared Boone
732561d01c Change vias to 13mil, 7mil annular ring. 
Was 13.5mm, but why?!?
 2015-08-29 22:31:29 -07:00
Jared Boone
1340991dba Reduce solder mask margin on WM8731. 
Trying to squeeze some mask web in there!
 2015-08-29 18:14:23 -07:00
Jared Boone
56c7c31cbb More footprint units cleanup. 2015-08-29 17:54:26 -07:00
Jared Boone
bda376df4b KiCad added courtyard layers. 2015-08-29 17:20:41 -07:00
Jared Boone
436e6fd21b Footprint cleanup 
Remove courtyard lines from silkscreen.
Round coordinates/dimensions to correct values (KiCad's old units don't convert nicely to the new units).
Restore U3 refdes silkscreen visibility.
 2015-08-29 17:14:06 -07:00
Jared Boone
c78b7fe196 Reduce mask margin on QFP pads. 2015-08-29 16:12:45 -07:00
furrtek
5468917da6 Merge branch 'master' of https://github.com/furrtek/portapack-hackrf 2015-08-28 20:52:15 +02:00
furrtek
0e0261f813 LCR in TEDI 1200/2400 AFSK transmit 2015-08-28 20:50:42 +02:00
Jared Boone
d61f3802cb Remove line in/out components and traces, microphone. 
Clean up traces and via stitching affected by removed components.
 2015-08-27 16:54:38 -07:00
Jared Boone
29243a5fd1 Schematic and netlist from schematic modifications. 2015-08-27 16:54:38 -07:00
Jared Boone
70d7ecc51b Clean up PCB net labels to match code, CPLD. 2015-08-27 16:54:38 -07:00
Jared Boone
75d9aa9c73 Remove extra CPLD code internal signals. 2015-08-27 16:54:38 -07:00
Jared Boone
19764ce693 Swap function of P2_8, P2_4 in schematic, firmware, CPLD. 
gpio_unused: P2_4 -> P2_8
gpio_lcd_rd: P2_8 -> P2_4
P2_8 is a very long line, shared with DFU button.
Revise schematic to match CPLD signal names.
 2015-08-27 16:54:38 -07:00
Jared Boone
b6e25692dc Label 1V8 regulator bypass/adjust capacitor as DNI. 
Was already DNI in assembly BOM. TCR2EF shows that pin as NC.
 2015-08-27 16:54:38 -07:00
Jared Boone
1ca4f45d9e Change VBAT capacitor to DNI. 
HackRF One has 100nF capacitor on VBAT. Having 10uF capacitor on PortaPack VBAT may slowly drain the coin cell when in storage, and add a bit of leakage current when installed.
 2015-08-27 16:54:38 -07:00
Jared Boone
8dfd68a6b3 Removed electret microphone. 2015-08-27 16:54:37 -07:00
Jared Boone
cd4840f1f9 Remove line in/out circuitry. 2015-08-27 16:54:37 -07:00
Jared Boone
84ffaaef33 Back-annotate CVPCB data into schematic. 
Remove CVPCB .cmp file, since it's a deprecated by the KiCad project.
 2015-08-27 16:54:37 -07:00
Jared Boone
bf4521bf35 Update schematic issue/copyright date. 
KiCad also made some automatic tweaks for latest build (bzr 6109).
 2015-08-27 16:54:37 -07:00
Jared Boone
3fea68d777 Adjust wideband specan gain to match other modes. 2015-08-27 14:57:05 -07:00