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2bb62af183
tillitis-key/hw/application_fpga/tb
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Daniel Lublin 2bb62af183
Update bit divisor calc in verilator's uart to our current 18 MHz
2022-10-03 13:11:53 +02:00
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application_fpga_verilator.cc Update bit divisor calc in verilator's uart to our current 18 MHz 2022-10-03 13:11:53 +02:00
application_fpga_vsim.v Make initial public release 2022-09-19 08:51:11 +02:00
reset_gen_vsim.v Fix Verilator sim by adding separate reset generator 2022-10-03 12:55:24 +02:00