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tillitis-key/hw/usb_interface/ch552_fw/inc
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Mikael Ågren 1e20dba10a
fpga/ch552: Swap fpga_cts and ch552_cts pins 
The FPGA uwg30 package cannot use B3 as an input when an instance of
SB_PLL40_CORE is placed. We swap fpga_cts and ch552_cts to make B3 (from
here on fpga_cts) an output.

For more info check out:
FPGA-TN-02052-1-4-iCE40-sysCLOCK-PLL-Design-User-Guide.pdf chapter "5.1
PLL Placement Rules"
2025-05-19 08:55:26 +02:00
..
ch554.h ch552: Add SPDX tags 2025-04-07 11:00:31 +02:00
ch554_usb.h ch552: Add CCID (Smart Card) support 2025-04-17 10:27:56 +02:00
config.h ch552: Add SPDX tags 2025-04-07 11:00:31 +02:00
debug.h ch552: Make CTS pins configurable 2025-05-19 08:55:26 +02:00
flash.h ch552: Add SPDX tags 2025-04-07 11:00:31 +02:00
gpio.h fpga/ch552: Swap fpga_cts and ch552_cts pins 2025-05-19 08:55:26 +02:00
io.h ch552: Add CCID (Smart Card) support 2025-04-17 10:27:56 +02:00
lib.h ch552: Add SPDX tags 2025-04-07 11:00:31 +02:00
mem.h ch552: Add SPDX tags 2025-04-07 11:00:31 +02:00
print.h ch552: Add SPDX tags 2025-04-07 11:00:31 +02:00
usb_strings.h ch552: Add CCID (Smart Card) support 2025-04-17 10:27:56 +02:00