Commit Graph

3 Commits

Author SHA1 Message Date
Jonas Thörnblad
3514d7ef3c
FPGA: Format verilog code 2024-10-22 12:04:19 +02:00
Joachim Strömbergson
8d4ad120d6
Doc: Add README for the ROM core.
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2024-08-29 16:06:59 +02:00
Joachim Strömbergson
d1cff273d7
FPGA: Move all sub modules into separate cores
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2024-08-29 16:06:58 +02:00