4 commits

Author	SHA1	Message	Date
Jonas Thörnblad	48cbb55d6e	Add incoming and outgoing CTS (Clear To Send) signals for the FPGA ... to let the CH552 and FPGA signal each other that it is OK to send UART data. The CTS signals indicate "OK to send" if high. If an incoming CTS signal goes low, the receiver of that signal should immediatly stop sending UART data.	2024-12-17 17:18:45 +01:00
Jonas Thörnblad	48c9709164	Set APP_SIZE if not defined.	2024-11-28 16:10:01 +01:00
Jonas Thörnblad	4260e1d5ac	Update application_fpga_sim.v to match application_fpga.v	2024-11-28 16:10:00 +01:00
Jonas Thörnblad	330146ba3a	Rename top level simulation files ... * Rename application_fpga_vsim.v and reset_gen_vsim.v to application_fpga_sim.v and reset_gen_sim.v * Update Makefile * Fix a typo	2024-11-12 15:33:33 +01:00

Renamed from hw/application_fpga/tb/application_fpga_vsim.v (Browse further)