to let the CH552 and FPGA signal each other that it is OK to send
UART data. The CTS signals indicate "OK to send" if high. If an
incoming CTS signal goes low, the receiver of that signal should
immediatly stop sending UART data.
- NOTE: This is an optional feature, not built by default. Not included
in the tk1 for sale at Tillitis shop.
- This makes it possible to interface the SPI flash onboard TKey.
- To include the SPI master in the build, use `make application_fpga.bin
YOSYS_FLAG=-DINCLUDE_SPI_MASTER`.
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
