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49 Commits 33 Branches 14 Tags 31 MiB
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4 Commits

Author SHA1 Message Date
Joachim Strömbergson
b2ca3f2ea0
Fix Verilator sim by adding separate reset generator 2022-10-03 12:55:24 +02:00
Joachim Strömbergson
90a57c4948
Use PLL and global buffer to increas clock speed 2022-09-27 16:41:38 +02:00
Daniel Lublin
40803993e1
Make synth.json depend on data/{uds,udi}.hex; revise docs 2022-09-20 16:37:04 +02:00
Joachim Strömbergson
715de60f4a Make initial public release 2022-09-19 08:51:11 +02:00