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Change UDS address to three bits to match input port connection 'addr'

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Signed-off-by: Joachim Strömbergson <joachim@assured.se>
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Joachim Strömbergson 2024-03-19 13:57:17 +01:00 • committed by Michael Cardell Widerkrantz
parent bbde62d3f5
commit f364b523cf
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GPG key ID: D3DB3DDF57E704E5
2 changed files with 8 additions and 17 deletions
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4
hw/application_fpga/rtl/application_fpga.v
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@ -115,7 +115,7 @@ module application_fpga(
/* verilator lint_off UNOPTFLAT */
reg uds_cs;
/* verilator lint_on UNOPTFLAT */
reg [7 : 0] uds_address;
reg [2 : 0] uds_address;
wire [31 : 0] uds_read_data;
wire uds_ready;
@ -404,7 +404,7 @@ module application_fpga(
timer_write_data = cpu_wdata;
uds_cs = 1'h0;
uds_address = cpu_addr[9 : 2];
uds_address = cpu_addr[4 : 2];
uart_cs = 1'h0;
uart_we = |cpu_wstrb;