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Count from init values to one, not zero

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Joachim Strömbergson 2022-10-18 11:06:40 +02:00
parent f6046d55a9
commit ddd969870e
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GPG Key ID: 865B8A548EA61679
1 changed files with 2 additions and 2 deletions
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hw/application_fpga/core/timer/rtl/timer_core.v
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@ -178,7 +178,7 @@ module timer_core(
end end
else begin else begin
if (prescaler_reg == 0) begin if (prescaler_reg == 1) begin
core_ctrl_new = CTRL_TIMER; core_ctrl_new = CTRL_TIMER;
core_ctrl_we = 1'h1; core_ctrl_we = 1'h1;
end else begin end else begin
@ -197,7 +197,7 @@ module timer_core(
end end
else begin else begin
if (timer_reg == 0) begin if (timer_reg == 1) begin
ready_new = 1'h1; ready_new = 1'h1;
ready_we = 1'h1; ready_we = 1'h1;
core_ctrl_new = CTRL_IDLE; core_ctrl_new = CTRL_IDLE;