mirror of
https://github.com/tillitis/tillitis-key1.git
synced 2024-12-24 23:19:32 -05:00
Add type annotations, lint for pep8
This commit is contained in:
Matt Mets
Michael Cardell Widerkrantz
parent
ac174afb8f
commit
84d020e3c0
8
hw/production_test/Makefile
Normal file
8
hw/production_test/Makefile
Normal file
@ -0,0 +1,8 @@
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lint:
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autopep8 --in-place --aggressive --aggressive usb_test.py
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mypy --disallow-untyped-defs usb_test.py
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#pycodestyle usb_test.py
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autopep8 --in-place --aggressive --aggressive icenvcm.py
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mypy --disallow-untyped-defs icenvcm.py
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#pycodestyle icenvcm.py
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357
hw/production_test/icenvcm.py
Normal file → Executable file
357
hw/production_test/icenvcm.py
Normal file → Executable file
@ -20,15 +20,10 @@
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#
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import usb_test
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from binascii import unhexlify, hexlify
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import sys
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from time import sleep
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import re
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import os
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def die(s):
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print(s, file=sys.stderr)
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exit(1)
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class Nvcm():
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# todo: add expected bitstream sizes
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@ -48,7 +43,7 @@ class Nvcm():
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0x21: "ICE40UP3K",
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}
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def __init__(self, pins, debug=False):
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def __init__(self, pins: dict, debug: bool = False) -> None:
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self.pins = pins
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self.debug = debug
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@ -73,47 +68,47 @@ class Nvcm():
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pins['miso']
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)
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def power_on(self):
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def power_on(self) -> None:
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self.flasher.gpio_put(self.pins['5v_en'], True)
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def power_off(self):
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def power_off(self) -> None:
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self.flasher.gpio_put(self.pins['5v_en'], False)
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def enable(self,cs,reset=1):
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#gpio.write(cs << cs_pin | reset << reset_pin)
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def enable(self, cs: bool, reset: bool = True) -> None:
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# gpio.write(cs << cs_pin | reset << reset_pin)
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self.flasher.gpio_put(self.pins['ss'], cs)
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self.flasher.gpio_put(self.pins['crst'], reset)
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def sendhex(self,s):
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def sendhex(self, s: str) -> int:
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if self.debug and not s == "0500": # supress status check messages
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print("TX", s)
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x = bytes.fromhex(s)
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#b = dev.exchange(x, duplex=True, readlen=len(x))
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# b = dev.exchange(x, duplex=True, readlen=len(x))
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b = self.flasher.spi_bitbang(x, toggle_cs=False)
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if self.debug and not s == "0500":
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print("RX", b.hex())
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return int.from_bytes(b, byteorder='big')
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def sendhex_cs(self,s):
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def sendhex_cs(self, s: str) -> bytes:
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if self.debug and not s == "0500":
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print("TX", s)
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x = bytes.fromhex(s)
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#b = dev.exchange(x, duplex=True, readlen=len(x))
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# b = dev.exchange(x, duplex=True, readlen=len(x))
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b = self.flasher.spi_bitbang(x)
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if self.debug and not s == "0500":
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print("RX", b.hex())
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return b
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def delay(self,count: int):
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def delay(self, count: int) -> None:
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# run the clock with no CS asserted
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#dev.exchange(b'\x00', duplex=True, readlen=count)
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# dev.exchange(b'\x00', duplex=True, readlen=count)
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self.sendhex('00' * count)
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def tck(self,count: int):
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def tck(self, count: int) -> None:
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self.delay(count >> 3)
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self.delay(count >> 3)
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self.delay(count >> 3)
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@ -121,54 +116,50 @@ class Nvcm():
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self.delay(count >> 3)
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self.delay(count >> 3)
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def init(self):
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def init(self) -> None:
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if self.debug:
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print("init")
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self.enable(1, 1)
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self.enable(1, 0) # reset high
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self.enable(True, True)
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self.enable(True, False) # reset high
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sleep(0.15)
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self.enable(0, 0) # enable and reset high
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self.enable(False, False) # enable and reset high
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sleep(0.12)
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self.enable(0, 1) # enable low, reset high
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self.enable(False, True) # enable low, reset high
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sleep(0.12)
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self.enable(1, 1) # enable and reset low
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self.enable(True, True) # enable and reset low
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sleep(0.12)
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return True
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def status_wait(self,count=1000):
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for i in range(0,count):
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def status_wait(self, count: int = 1000) -> None:
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for i in range(0, count):
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self.tck(5000)
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ret = self.sendhex_cs("0500")
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x = int.from_bytes(ret, byteorder='big')
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#print("x=%04x" %(x))
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# print("x=%04x" %(x))
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if (x & 0x00c1) == 0:
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return True
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return
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print("status failed to clear", file=sys.stdout)
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return False
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raise Exception("status failed to clear")
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def command(self,cmd):
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def command(self, cmd: str) -> None:
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self.sendhex_cs(cmd)
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if not self.status_wait():
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return False
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self.status_wait()
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self.tck(8)
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return True
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def pgm_enable(self):
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return self.command("06")
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def pgm_enable(self) -> None:
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self.command("06")
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def pgm_disable(self):
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return self.command("04")
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def pgm_disable(self) -> None:
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self.command("04")
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def enable_access(self):
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def enable_access(self) -> None:
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# ! Shift in Access-NVCM instruction;
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# SMCInstruction[1] = 0x70807E99557E;
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return self.command("7eaa997e010e")
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self.command("7eaa997e010e")
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def read(self, address, length=8, cmd=0x03):
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def read(self, address: int, length: int = 8, cmd: int = 0x03) -> int:
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"""Returns a big integer"""
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# enable(0)
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# sendhex("%02x%06x" % (cmd, address))
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@ -185,138 +176,126 @@ class Nvcm():
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ret = self.sendhex_cs(msg)
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x = 0
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for i in range(0,length):
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x = x << 8 | ret[i + 4+9]
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for i in range(0, length):
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x = x << 8 | ret[i + 4 + 9]
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return x
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def read_bytes(self, address, length=8):
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def read_bytes(self, address: int, length: int = 8) -> bytes:
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"""Returns a byte array of the contents"""
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return self.read(address, length).to_bytes(length, byteorder="big")
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def write(self,address, data, cmd=0x02):
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def write(self, address: int, data: str, cmd: int = 0x02) -> None:
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self.sendhex_cs("%02x%06x" % (cmd, address) + data)
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if not self.status_wait():
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print("WRITE FAILED: cmd=%02x address=%06x data=%s" % (cmd, address, data.hex()), file=sys.stderr)
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return False
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try:
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self.status_wait()
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except Exception as e:
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raise Exception("WRITE FAILED: cmd=%02x address=%06x data=%s" %
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(cmd, address, data))
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self.tck(8)
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return True
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def bank_select(self,bank):
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return self.write(cmd=0x83, address=0x000025, data="%02x" % (bank))
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def bank_select(self, bank: int) -> None:
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self.write(cmd=0x83, address=0x000025, data="%02x" % (bank))
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def select_nvcm(self):
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def select_nvcm(self) -> None:
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# ! Shift in Restore Access-NVCM instruction;
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# SDR 40 TDI(0x00A40000C1);
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return self.bank_select(0x00)
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self.bank_select(0x00)
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def select_trim(self):
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def select_trim(self) -> None:
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# ! Shift in Trim setup-NVCM instruction;
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# SDR 40 TDI(0x08A40000C1);
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return self.bank_select(0x10)
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self.bank_select(0x10)
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def select_sig(self):
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def select_sig(self) -> None:
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# ! Shift in Access Silicon Signature instruction;
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# IDInstruction[1] = 0x04A40000C1;
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# SDR 40 TDI(IDInstruction[1]);
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return self.bank_select(0x20)
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self.bank_select(0x20)
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def read_trim(self):
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def read_trim(self) -> int:
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# ! Shift in Access-NVCM instruction;
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# SMCInstruction[1] = 0x70807E99557E;
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if not self.enable_access():
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return
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self.enable_access()
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# ! Shift in READ_RF(0x84) instruction;
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# SDR 104 TDI(0x00000000000000000004000021);
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x = self.read(cmd=0x84, address=0x000020, length=8)
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self.tck(8)
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#print("FSM Trim Register %x" % (x))
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# print("FSM Trim Register %x" % (x))
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self.select_nvcm()
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return x
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def write_trim(self,data):
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def write_trim(self, data: str) -> None:
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# ! Setup Programming Parameter in Trim Registers;
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# ! Shift in Trim setup-NVCM instruction;
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# TRIMInstruction[1] = 0x000000430F4FA80004000041;
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return self.write(cmd=0x82, address=0x000020, data=data)
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self.write(cmd=0x82, address=0x000020, data=data)
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def nvcm_enable(self):
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def nvcm_enable(self) -> None:
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if self.debug:
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print("enable")
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# ! Shift in Access-NVCM instruction;
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# SMCInstruction[1] = 0x70807E99557E;
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if not self.enable_access():
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return
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self.enable_access()
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# ! Setup Reading Parameter in Trim Registers;
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# ! Shift in Trim setup-NVCM instruction;
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# TRIMInstruction[1] = 0x000000230000000004000041;
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if self.debug:
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print("setup_nvcm")
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return self.write_trim("00000000c4000000")
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self.write_trim("00000000c4000000")
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def enable_trim(self):
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def enable_trim(self) -> None:
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# ! Setup Programming Parameter in Trim Registers;
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# ! Shift in Trim setup-NVCM instruction;
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# TRIMInstruction[1] = 0x000000430F4FA80004000041;
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return self.write_trim("0015f2f0c2000000")
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self.write_trim("0015f2f0c2000000")
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def disable(self):
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if not self.select_nvcm():
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return
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def trim_blank_check(self) -> bool:
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print("NVCM Trim_Parameter_OTP blank check")
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self.reset(1)
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self.tck(8)
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self.reset(0)
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self.tck(8)
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def trim_blank_check(self):
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print ("NVCM Trim_Parameter_OTP blank check");
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if not self.select_trim():
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return
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self.select_trim()
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x = self.read(0x000020, 1)
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self.select_nvcm()
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if x != 0:
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die ("NVCM Trim_Parameter_OTP Block is not blank. (%02x)" % x);
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print("NVCM Trim_Parameter_OTP Block is not blank. (%02x)" % x)
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return False
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return True
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def blank_check(self,total_fuse):
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def blank_check(self, total_fuse: int) -> bool:
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self.select_nvcm()
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status = True
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print ("NVCM main memory blank check");
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print("NVCM main memory blank check")
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contents = self.read_bytes(0x000000, total_fuse)
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for i in range(0,total_fuse):
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for i in range(0, total_fuse):
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x = contents[i]
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if debug:
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if self.debug:
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print("%08x: %02x" % (i, x))
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if x != 0:
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print ("%08x: NVCM Main Memory Block is not blank." % (i), file=sys.stderr)
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print(
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"%08x: NVCM Main Memory Block is not blank." %
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(i), file=sys.stderr)
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status = False
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#break
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self.select_nvcm()
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return status
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def program(self,rows):
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def program(self, rows: list[str]) -> None:
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print("NVCM Program main memory")
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self.select_nvcm()
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if not self.enable_trim():
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return False
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self.enable_trim()
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print ("NVCM Program main memory")
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if not self.pgm_enable():
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return False
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self.pgm_enable()
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status = True
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@ -325,28 +304,21 @@ class Nvcm():
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if i % 1024 == 0:
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print("%6d / %6d bytes" % (i, len(rows) * 8))
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i += 8
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if not self.command(row):
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status = False
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break
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try:
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self.command(row)
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except Exception as e:
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raise Exception("programming failed, row:", row)
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self.pgm_disable()
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if not status:
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print("PROGRAMMING FAILED", file=sys.stderr)
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return status
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def write_trim_pages(self, lock_bits: str) -> None:
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self.select_nvcm()
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def write_trim_pages(self,lock_bits):
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if not self.select_nvcm():
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die("select trim failed")
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self.enable_trim()
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if not self.enable_trim():
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die("write trim command failed")
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self.select_trim()
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if not self.select_trim():
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die("select trim failed")
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if not self.pgm_enable():
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die("write enable failed")
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self.pgm_enable()
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# ! Program Security Bit row 1;
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# ! Shift in PAGEPGM instruction;
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@ -357,14 +329,10 @@ class Nvcm():
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# SDR 96 TDI(0x000000008000000C05000040);
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# ! Program Security Bit row 4;
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# SDR 96 TDI(0x00000000800000C07000040);
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if not self.write(0x000020, lock_bits):
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die("trim write 0x20 failed")
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if not self.write(0x000060, lock_bits):
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die("trim write 0x60 failed")
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if not self.write(0x0000a0, lock_bits):
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die("trim write 0xa0 failed")
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if not self.write(0x0000e0, lock_bits):
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die("trim write 0xe0 failed")
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self.write(0x000020, lock_bits)
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self.write(0x000060, lock_bits)
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self.write(0x0000a0, lock_bits)
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self.write(0x0000e0, lock_bits)
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self.pgm_disable()
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@ -373,27 +341,27 @@ class Nvcm():
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self.select_nvcm()
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lock_bits = int(lock_bits,16)
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if x & lock_bits != lock_bits:
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die("Failed to write trim lock bits: %016x != expected %016x" % (x,lock_bits))
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lock_bits_int = int(lock_bits, 16)
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if x & lock_bits_int != lock_bits_int:
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raise Exception(
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"Failed to write trim lock bits: %016x != expected %016x" %
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(x, lock_bits_int))
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print("New state %016x" % (x))
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return True
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def trim_secure(self):
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print ("NVCM Secure")
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def trim_secure(self) -> None:
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print("NVCM Secure")
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trim = self.read_trim()
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if (trim >> 60) & 0x3 != 0:
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print("NVCM already secure? trim=%016x" % (trim), file=sys.stderr)
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return self.write_trim_pages("3000000100000000")
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self.write_trim_pages("3000000100000000")
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def trim_program(self) -> None:
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print("NVCM Program Trim_Parameter_OTP")
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self.write_trim_pages("0015f2f1c4000000")
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def trim_program(self):
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print ("NVCM Program Trim_Parameter_OTP");
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return self.write_trim_pages("0015f2f1c4000000")
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def info(self):
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def info(self) -> None:
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self.select_sig()
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sig1 = self.read(0x000000, 8)
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@ -431,23 +399,20 @@ class Nvcm():
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print("Sig 0: %016x" % (sig1))
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print("Sig 1: %016x" % (sig2))
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print("TrimRF: %016x" % (trim))
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print("Trim 0: %016x" % (trim0))
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print("Trim 1: %016x" % (trim1))
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print("Trim 2: %016x" % (trim2))
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print("Trim 3: %016x" % (trim3))
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return True
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def read_file(self,filename):
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def read_file(self, filename: str) -> None:
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self.select_nvcm()
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total_fuse = 104090
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contents = b''
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|
||||
for offset in range(0,total_fuse,8):
|
||||
for offset in range(0, total_fuse, 8):
|
||||
if offset % 1024 == 0:
|
||||
print("%6d / %6d bytes" % (offset, total_fuse))
|
||||
contents += self.read_bytes(offset, 8)
|
||||
@ -466,15 +431,14 @@ class Nvcm():
|
||||
# bistream to NVCM command conversion is based on majbthrd's work in
|
||||
# https://github.com/YosysHQ/icestorm/pull/272
|
||||
#
|
||||
def bitstream2nvcm(bitstream):
|
||||
def bitstream2nvcm(bitstream: bytes) -> list[str]:
|
||||
# ensure that the file starts with the correct bistream preamble
|
||||
for origin in range(0,len(bitstream)):
|
||||
if bitstream[origin:origin+4] == bytes.fromhex('7EAA997E'):
|
||||
for origin in range(0, len(bitstream)):
|
||||
if bitstream[origin:origin + 4] == bytes.fromhex('7EAA997E'):
|
||||
break
|
||||
|
||||
if origin == len(bitstream):
|
||||
print("Preamble not found", file=sys.stderr)
|
||||
return False
|
||||
raise Exception("Preamble not found")
|
||||
|
||||
print("Found preamable at %08x" % (origin), file=sys.stderr)
|
||||
|
||||
@ -486,7 +450,7 @@ def bitstream2nvcm(bitstream):
|
||||
rows = []
|
||||
|
||||
for pos in range(origin, len(bitstream), 8):
|
||||
row = bitstream[pos:pos+8]
|
||||
row = bitstream[pos:pos + 8]
|
||||
|
||||
# pad out to 8-bytes
|
||||
row += b'\0' * (8 - len(row))
|
||||
@ -498,11 +462,13 @@ def bitstream2nvcm(bitstream):
|
||||
# NVCM addressing is very weird
|
||||
addr = pos - origin
|
||||
nvcm_addr = int(addr / 328) * 4096 + (addr % 328)
|
||||
rows += [ "02 %06x %s" % (nvcm_addr, row.hex()) ]
|
||||
rows += ["02 %06x %s" % (nvcm_addr, row.hex())]
|
||||
|
||||
return rows
|
||||
|
||||
def sleep_flash(pins):
|
||||
|
||||
def sleep_flash(pins: dict) -> None:
|
||||
""" Put the SPI bootloader flash in deep sleep mode"""
|
||||
flasher = usb_test.ice40_flasher()
|
||||
|
||||
# Disable board power
|
||||
@ -529,31 +495,35 @@ def sleep_flash(pins):
|
||||
pins['mosi']
|
||||
)
|
||||
|
||||
flasher.spi_bitbang([0xAB])
|
||||
flasher.spi_bitbang(bytes([0xAB]))
|
||||
|
||||
# Confirm we can talk to flash
|
||||
data = flasher.spi_bitbang([0x9f, 0,0])
|
||||
data = flasher.spi_bitbang(bytes([0x9f, 0, 0]))
|
||||
|
||||
print('flash ID while awake:', ' '.join(['{:02x}'.format(b) for b in data]))
|
||||
assert(data == bytes([0xff, 0xef, 0x40]))
|
||||
print('flash ID while awake:', ' '.join(
|
||||
['{:02x}'.format(b) for b in data]))
|
||||
assert (data == bytes([0xff, 0xef, 0x40]))
|
||||
|
||||
# Test that the flash will ignore a sleep command that doesn't start on the first byte
|
||||
flasher.spi_bitbang([0, 0xb9])
|
||||
# Test that the flash will ignore a sleep command that doesn't start on
|
||||
# the first byte
|
||||
flasher.spi_bitbang(bytes([0, 0xb9]))
|
||||
|
||||
# Confirm we can talk to flash
|
||||
data = flasher.spi_bitbang([0x9f, 0,0])
|
||||
data = flasher.spi_bitbang(bytes([0x9f, 0, 0]))
|
||||
|
||||
print('flash ID while awake:', ' '.join(['{:02x}'.format(b) for b in data]))
|
||||
assert(data == bytes([0xff, 0xef, 0x40]))
|
||||
print('flash ID while awake:', ' '.join(
|
||||
['{:02x}'.format(b) for b in data]))
|
||||
assert (data == bytes([0xff, 0xef, 0x40]))
|
||||
|
||||
# put the flash to sleep
|
||||
flasher.spi_bitbang([0xb9])
|
||||
flasher.spi_bitbang(bytes([0xb9]))
|
||||
|
||||
# Confirm flash is asleep
|
||||
data = flasher.spi_bitbang(buf=[0x9f, 0,0])
|
||||
data = flasher.spi_bitbang(bytes([0x9f, 0, 0]))
|
||||
|
||||
print('flash ID while asleep:', ' '.join(['{:02x}'.format(b) for b in data]))
|
||||
assert(data == bytes([0xff, 0xff, 0xff]))
|
||||
print('flash ID while asleep:', ' '.join(
|
||||
['{:02x}'.format(b) for b in data]))
|
||||
assert (data == bytes([0xff, 0xff, 0xff]))
|
||||
|
||||
|
||||
if __name__ == "__main__":
|
||||
@ -562,22 +532,26 @@ if __name__ == "__main__":
|
||||
|
||||
parser = argparse.ArgumentParser()
|
||||
|
||||
parser.add_argument( '--port',
|
||||
parser.add_argument('--port',
|
||||
type=str,
|
||||
default='ftdi://::/1',
|
||||
help='FTDI port of the form ftdi://::/1')
|
||||
|
||||
parser.add_argument( '-v', '--verbose',
|
||||
parser.add_argument('-v', '--verbose',
|
||||
dest='verbose',
|
||||
action='store_true',
|
||||
help='Show debug information and serial read/writes')
|
||||
|
||||
parser.add_argument('-f', '--sleep_flash',
|
||||
parser.add_argument(
|
||||
'-f',
|
||||
'--sleep_flash',
|
||||
dest='sleep_flash',
|
||||
action='store_true',
|
||||
help='Put an attached SPI flash chip in deep sleep before programming FPGA')
|
||||
|
||||
parser.add_argument('-b', '--boot',
|
||||
parser.add_argument(
|
||||
'-b',
|
||||
'--boot',
|
||||
dest='do_boot',
|
||||
action='store_true',
|
||||
help='Deassert the reset line to allow the FPGA to boot')
|
||||
@ -593,7 +567,8 @@ if __name__ == "__main__":
|
||||
default=None,
|
||||
help='Read contents of NVCM')
|
||||
|
||||
parser.add_argument('--write',
|
||||
parser.add_argument(
|
||||
'--write',
|
||||
dest='write_file',
|
||||
type=str,
|
||||
default=None,
|
||||
@ -604,41 +579,41 @@ if __name__ == "__main__":
|
||||
action='store_true',
|
||||
help='Proceed even if the chip is not blank')
|
||||
|
||||
parser.add_argument('--secure',
|
||||
parser.add_argument(
|
||||
'--secure',
|
||||
dest='set_secure',
|
||||
action='store_true',
|
||||
help='Set security bits to prevent modification (warning: not reversable!')
|
||||
|
||||
parser.add_argument('--my-design-is-good-enough',
|
||||
parser.add_argument(
|
||||
'--my-design-is-good-enough',
|
||||
dest='good_enough',
|
||||
action='store_true',
|
||||
help='Enable the dangerous commands --write and --secure')
|
||||
|
||||
args = parser.parse_args()
|
||||
|
||||
|
||||
if not args.good_enough \
|
||||
and (args.write_file or args.set_secure):
|
||||
print("Are you sure your design is good enough?", file=sys.stderr)
|
||||
exit(1)
|
||||
|
||||
# Instantiate a SPI controller, with separately managed CS line
|
||||
#spi = SpiController()
|
||||
# spi = SpiController()
|
||||
|
||||
# Configure the first interface (IF/1) of the FTDI device as a SPI controller
|
||||
#spi.configure(args.port)
|
||||
|
||||
# spi.configure(args.port)
|
||||
|
||||
# Get a port to a SPI device w/ /CS on A*BUS3 and SPI mode 0 @ 12MHz
|
||||
# the CS line is not used in this case
|
||||
#dev = spi.get_port(cs=0, freq=12E6, mode=0)
|
||||
# dev = spi.get_port(cs=0, freq=12E6, mode=0)
|
||||
|
||||
#reset_pin = 7
|
||||
#cs_pin = 4
|
||||
# reset_pin = 7
|
||||
# cs_pin = 4
|
||||
|
||||
# Get GPIO port to manage the CS and RESET pins
|
||||
#gpio = spi.get_gpio()
|
||||
#gpio.set_direction(1 << reset_pin | 1 << cs_pin, 1 << reset_pin | 1 << cs_pin)
|
||||
# gpio = spi.get_gpio()
|
||||
# gpio.set_direction(1 << reset_pin | 1 << cs_pin, 1 << reset_pin | 1 << cs_pin)
|
||||
|
||||
# Enable power to the FPGA, then set both reset and CS pins high
|
||||
|
||||
@ -647,13 +622,13 @@ if __name__ == "__main__":
|
||||
# flasher.gpio_set_direction(tp1_pins[pin], False)
|
||||
|
||||
tp1_pins = {
|
||||
'5v_en' : 7,
|
||||
'sck' : 10,
|
||||
'mosi' : 11,
|
||||
'ss' : 12,
|
||||
'miso' : 13,
|
||||
'crst' : 14,
|
||||
'cdne' : 15
|
||||
'5v_en': 7,
|
||||
'sck': 10,
|
||||
'mosi': 11,
|
||||
'ss': 12,
|
||||
'miso': 13,
|
||||
'crst': 14,
|
||||
'cdne': 15
|
||||
}
|
||||
|
||||
if args.sleep_flash:
|
||||
@ -663,11 +638,11 @@ if __name__ == "__main__":
|
||||
nvcm.power_on()
|
||||
|
||||
# # Turn on ICE40 in CRAM boot mode
|
||||
nvcm.init() or exit(1)
|
||||
nvcm.nvcm_enable() or exit(1)
|
||||
nvcm.init()
|
||||
nvcm.nvcm_enable()
|
||||
|
||||
if args.read_info:
|
||||
nvcm.info() or exit(1)
|
||||
nvcm.info()
|
||||
|
||||
if args.write_file:
|
||||
with open(args.write_file, "rb") as f:
|
||||
@ -683,20 +658,20 @@ if __name__ == "__main__":
|
||||
nvcm.blank_check(0x100) or exit(1)
|
||||
|
||||
# this is it!
|
||||
nvcm.program(cmds) or exit(1)
|
||||
nvcm.program(cmds)
|
||||
|
||||
# update the trim to boot from nvcm
|
||||
nvcm.trim_program() or exit(1)
|
||||
nvcm.trim_program()
|
||||
|
||||
if args.read_file:
|
||||
# read back after writing to the NVCM
|
||||
nvcm.read_file(args.read_file) or exit(1)
|
||||
nvcm.read_file(args.read_file)
|
||||
|
||||
if args.set_secure:
|
||||
nvcm.trim_secure() or exit(1)
|
||||
nvcm.trim_secure()
|
||||
|
||||
if args.do_boot:
|
||||
# hold reset low for half a second
|
||||
nvcm.enable(1,0)
|
||||
nvcm.enable(True, False)
|
||||
sleep(0.5)
|
||||
nvcm.enable(1,1)
|
||||
nvcm.enable(True, True)
|
||||
|
||||
@ -1,8 +1,9 @@
|
||||
#!/usr/bin/env python
|
||||
import usb.core
|
||||
import usb.util
|
||||
import usb.core # type: ignore
|
||||
import usb.util # type: ignore
|
||||
import struct
|
||||
|
||||
|
||||
class ice40_flasher:
|
||||
FLASHER_REQUEST_LED_SET = 0x00,
|
||||
FLASHER_REQUEST_PIN_DIRECTION_SET = 0x10
|
||||
@ -15,13 +16,7 @@ class ice40_flasher:
|
||||
FLASHER_REQUEST_ADC_READ = 0x50
|
||||
FLASHER_REQUEST_BOOTLOADRE = 0xFF
|
||||
|
||||
def __init__(self):
|
||||
# self.dev = None
|
||||
# for dict in hid.enumerate(USB_VID):
|
||||
# self.dev = hid.Device(dict['vendor_id'], dict['product_id'])
|
||||
# if self.dev is None:
|
||||
# raise IOError("Couldn't find any hid device with vendor id 0x%x" % (USB_VID))
|
||||
|
||||
def __init__(self) -> None:
|
||||
# See: https://github.com/pyusb/pyusb/blob/master/docs/tutorial.rst
|
||||
self.dev = usb.core.find(idVendor=0xcafe, idProduct=0x4010)
|
||||
|
||||
@ -30,27 +25,22 @@ class ice40_flasher:
|
||||
|
||||
self.dev.set_configuration()
|
||||
|
||||
def close(self):
|
||||
"""Close the HID device"""
|
||||
#self.dev.close()
|
||||
pass
|
||||
def _write(self, request_id: int, data: bytes) -> None:
|
||||
self.dev.ctrl_transfer(0x40, request_id, 0, 0, data)
|
||||
|
||||
def _write(self, request_id: int, data: bytes):
|
||||
self.dev.ctrl_transfer(0x40, request_id,0,0,data)
|
||||
|
||||
def _write_bulk(self, request_id: int, data: bytes):
|
||||
def _write_bulk(self, request_id: int, data: bytes) -> None:
|
||||
msg = bytearray()
|
||||
msg.append(request_id)
|
||||
msg.extend(data)
|
||||
self.dev.write(0x01, data)
|
||||
|
||||
def _read(self, request_id: int, length: int) -> bytes:
|
||||
#ctrl_transfer(self, bmRequestType, bRequest, wValue=0, wIndex=0, data_or_wLength = None, timeout = None):
|
||||
# ctrl_transfer(self, bmRequestType, bRequest, wValue=0, wIndex=0, data_or_wLength = None, timeout = None):
|
||||
# Request type:
|
||||
# bit 7: direction 0:host to device (OUT), 1: device to host (IN)
|
||||
# bits 5-6: type: 0:standard 1:class 2:vendor 3:reserved
|
||||
# bits 0-4: recipient: 0:device 1:interface 2:endpoint 3:other
|
||||
ret = self.dev.ctrl_transfer(0xC0, request_id,0,0,length)
|
||||
ret = self.dev.ctrl_transfer(0xC0, request_id, 0, 0, length)
|
||||
return ret
|
||||
|
||||
def gpio_set_direction(self, pin: int, direction: bool) -> None:
|
||||
@ -61,11 +51,11 @@ class ice40_flasher:
|
||||
value -- True: Set pin as output, False: set pin as input
|
||||
"""
|
||||
msg = struct.pack('>II',
|
||||
(1<<pin),
|
||||
((1 if direction else 0)<<pin),
|
||||
(1 << pin),
|
||||
((1 if direction else 0) << pin),
|
||||
)
|
||||
|
||||
#self._write_bulk(self.FLASHER_REQUEST_PIN_DIRECTION_SET, msg)
|
||||
# self._write_bulk(self.FLASHER_REQUEST_PIN_DIRECTION_SET, msg)
|
||||
self._write(self.FLASHER_REQUEST_PIN_DIRECTION_SET, msg)
|
||||
|
||||
def gpio_set_pulls(self, pin: int, pullup: bool, pulldown: bool) -> None:
|
||||
@ -78,9 +68,9 @@ class ice40_flasher:
|
||||
pulldown -- True: Enable pulldown, False: Disable pulldown
|
||||
"""
|
||||
msg = struct.pack('>III',
|
||||
(1<<pin),
|
||||
((1 if pullup else 0)<<pin),
|
||||
((1 if pulldown else 0)<<pin),
|
||||
(1 << pin),
|
||||
((1 if pullup else 0) << pin),
|
||||
((1 if pulldown else 0) << pin),
|
||||
)
|
||||
|
||||
self._write(self.FLASHER_REQUEST_PULLUPS_SET, msg)
|
||||
@ -101,7 +91,7 @@ class ice40_flasher:
|
||||
|
||||
def gpio_get_all(self) -> int:
|
||||
"""Read the input levels of all GPIO pins"""
|
||||
msg_in = self._read(self.FLASHER_REQUEST_PIN_VALUES_GET,4)
|
||||
msg_in = self._read(self.FLASHER_REQUEST_PIN_VALUES_GET, 4)
|
||||
[gpio_states] = struct.unpack('>I', msg_in)
|
||||
|
||||
return gpio_states
|
||||
@ -112,7 +102,7 @@ class ice40_flasher:
|
||||
Keyword arguments:
|
||||
pin -- GPIO pin number
|
||||
"""
|
||||
gpio_states = gpio_get_all()
|
||||
gpio_states = self.gpio_get_all()
|
||||
|
||||
return ((gpio_states >> pin) & 0x01) == 0x01
|
||||
|
||||
@ -138,12 +128,12 @@ class ice40_flasher:
|
||||
msg = bytearray()
|
||||
msg.extend(header)
|
||||
|
||||
self._write(self.FLASHER_REQUEST_SPI_PINS_SET,msg)
|
||||
self._write(self.FLASHER_REQUEST_SPI_PINS_SET, msg)
|
||||
|
||||
def spi_bitbang(
|
||||
self,
|
||||
buf: bytearray,
|
||||
toggle_cs: bool = True) -> bytearray:
|
||||
buf: bytes,
|
||||
toggle_cs: bool = True) -> bytes:
|
||||
"""Bitbang a SPI transfer
|
||||
|
||||
Keyword arguments:
|
||||
@ -153,7 +143,7 @@ class ice40_flasher:
|
||||
|
||||
ret = bytearray()
|
||||
|
||||
max_chunk_size = (1024-8)
|
||||
max_chunk_size = (1024 - 8)
|
||||
for i in range(0, len(buf), max_chunk_size):
|
||||
chunk = buf[i:i + max_chunk_size]
|
||||
ret.extend(
|
||||
@ -161,13 +151,13 @@ class ice40_flasher:
|
||||
buf=chunk,
|
||||
toggle_cs=toggle_cs))
|
||||
|
||||
return ret
|
||||
return bytes(ret)
|
||||
|
||||
def spi_bitbang_inner(
|
||||
self,
|
||||
buf: bytearray,
|
||||
buf: bytes,
|
||||
bit_count: int = -1,
|
||||
toggle_cs: bool = True) -> bytearray:
|
||||
toggle_cs: bool = True) -> bytes:
|
||||
"""Bitbang a SPI transfer using the specificed GPIO pins
|
||||
|
||||
Note that this command does not handle setting a CS pin, that must be accomplished
|
||||
@ -181,16 +171,16 @@ class ice40_flasher:
|
||||
if bit_count == -1:
|
||||
bit_count = len(buf) * 8
|
||||
|
||||
byte_length = (bit_count+7)//8
|
||||
byte_length = (bit_count + 7) // 8
|
||||
|
||||
if byte_length > (1024-8):
|
||||
if byte_length > (1024 - 8):
|
||||
print('Message too large, bit_count:{:}'.format(bit_count))
|
||||
exit(1)
|
||||
|
||||
if byte_length != len(buf):
|
||||
print(
|
||||
'Bit count size mismatch, bit_count:{:} len(buf):{:}'.format(bit_count),
|
||||
len(buf) * 8)
|
||||
'Bit count size mismatch, bit_count:{:} len(buf):{:}'.format(
|
||||
bit_count, len(buf) * 8))
|
||||
exit(1)
|
||||
|
||||
header = struct.pack('>I',
|
||||
@ -200,43 +190,30 @@ class ice40_flasher:
|
||||
msg.extend(buf)
|
||||
|
||||
if toggle_cs:
|
||||
self._write(self.FLASHER_REQUEST_SPI_BITBANG_CS,msg)
|
||||
msg_in = self._read(self.FLASHER_REQUEST_SPI_BITBANG_CS, byte_length)
|
||||
self._write(self.FLASHER_REQUEST_SPI_BITBANG_CS, msg)
|
||||
msg_in = self._read(
|
||||
self.FLASHER_REQUEST_SPI_BITBANG_CS,
|
||||
byte_length)
|
||||
else:
|
||||
self._write(self.FLASHER_REQUEST_SPI_BITBANG_NO_CS,msg)
|
||||
msg_in = self._read(self.FLASHER_REQUEST_SPI_BITBANG_NO_CS, byte_length)
|
||||
self._write(self.FLASHER_REQUEST_SPI_BITBANG_NO_CS, msg)
|
||||
msg_in = self._read(
|
||||
self.FLASHER_REQUEST_SPI_BITBANG_NO_CS,
|
||||
byte_length)
|
||||
|
||||
return msg_in
|
||||
|
||||
def adc_read_all(self) -> list[float]:
|
||||
def adc_read_all(self) -> tuple[float, float, float]:
|
||||
"""Read the voltage values of ADC 0, 1, and 2
|
||||
|
||||
The firmware will read the values for each input multiple times, and return averaged values for each input.
|
||||
"""
|
||||
msg_in = self._read(self.FLASHER_REQUEST_ADC_READ,3*4)
|
||||
msg_in = self._read(self.FLASHER_REQUEST_ADC_READ, 3 * 4)
|
||||
[ch0, ch1, ch2] = struct.unpack('>III', msg_in)
|
||||
|
||||
return ch0/1000000, ch1/1000000, ch2/1000000
|
||||
return ch0 / 1000000, ch1 / 1000000, ch2 / 1000000
|
||||
|
||||
|
||||
if __name__ == '__main__':
|
||||
flasher = ice40_flasher()
|
||||
print(flasher.gpio_get_all())
|
||||
print(flasher.adc_read_all())
|
||||
|
||||
# for pin in range(10,13):
|
||||
# flasher.gpio_set_direction(pin, True)
|
||||
|
||||
# while True:
|
||||
# for pin in range(10,13):
|
||||
# flasher.gpio_put(pin, True)
|
||||
# flasher.gpio_put(pin, False)
|
||||
|
||||
flasher.gpio_set_direction(10, True)
|
||||
flasher.gpio_set_direction(11, True)
|
||||
flasher.gpio_set_direction(13, False)
|
||||
|
||||
|
||||
buf = [0x01,0x02,0x03, 0xFE]
|
||||
|
||||
while True:
|
||||
flasher.spi_bitbang_inner(sck_pin=10, mosi_pin=11, miso_pin=13, buf=buf)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user