mirror of
https://github.com/tillitis/tillitis-key1.git
synced 2024-12-29 17:36:26 -05:00
Use streamlined USB interface, make NVCM a class
This commit is contained in:
Matt Mets
Michael Cardell Widerkrantz
parent
4eb025a978
commit
ac174afb8f
@ -26,394 +26,440 @@ from time import sleep
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import re
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import os
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debug = False
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# todo: add expected bitstream sizes
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nvcm_id_table = {
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0x06: "ICE40LP8K / ICE40HX8K",
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0x07: "ICE40LP4K / ICE40HX4K",
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0x08: "ICE40LP1K / ICE40HX1K",
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0x09: "ICE40LP384",
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0x0E: "ICE40LP1K_SWG16",
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0x0F: "ICE40LP640_SWG16",
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0x10: "ICE5LP1K",
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0x11: "ICE5LP2K",
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0x12: "ICE5LP4K",
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0x14: "ICE40UL1K",
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0x15: "ICE40UL640",
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0x20: "ICE40UP5K",
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0x21: "ICE40UP3K",
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}
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def die(s):
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print(s, file=sys.stderr)
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exit(1)
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def enable(cs,reset=1):
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#gpio.write(cs << cs_pin | reset << reset_pin)
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flasher.gpio_put(tp1_pins['ss'], cs)
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flasher.gpio_put(tp1_pins['crst'], reset)
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class Nvcm():
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# todo: add expected bitstream sizes
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id_table = {
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0x06: "ICE40LP8K / ICE40HX8K",
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0x07: "ICE40LP4K / ICE40HX4K",
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0x08: "ICE40LP1K / ICE40HX1K",
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0x09: "ICE40LP384",
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0x0E: "ICE40LP1K_SWG16",
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0x0F: "ICE40LP640_SWG16",
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0x10: "ICE5LP1K",
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0x11: "ICE5LP2K",
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0x12: "ICE5LP4K",
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0x14: "ICE40UL1K",
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0x15: "ICE40UL640",
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0x20: "ICE40UP5K",
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0x21: "ICE40UP3K",
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}
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def sendhex(s):
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if debug and not s == "0500":
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print("TX", s)
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x = bytes.fromhex(s)
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def __init__(self, pins, debug=False):
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self.pins = pins
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self.debug = debug
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#b = dev.exchange(x, duplex=True, readlen=len(x))
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b = flasher.spi_bitbang(sck_pin=tp1_pins['sck'], mosi_pin=tp1_pins['mosi'], miso_pin=tp1_pins['miso'], buf=x)
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self.flasher = usb_test.ice40_flasher()
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if debug and not s == "0500":
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print("RX", b.hex())
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return int.from_bytes(b, byteorder='big')
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self.flasher.gpio_put(self.pins['5v_en'], False)
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self.flasher.gpio_put(self.pins['crst'], False)
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def delay(count: int):
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# run the clock with no CS asserted
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#dev.exchange(b'\x00', duplex=True, readlen=count)
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sendhex('00' * count)
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# Configure pins for talking to ice40
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self.flasher.gpio_set_direction(pins['ss'], True)
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self.flasher.gpio_set_direction(pins['mosi'], True)
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self.flasher.gpio_set_direction(pins['sck'], True)
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self.flasher.gpio_set_direction(pins['miso'], False)
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self.flasher.gpio_set_direction(pins['5v_en'], True)
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self.flasher.gpio_set_direction(pins['crst'], True)
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self.flasher.gpio_set_direction(pins['cdne'], False)
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def tck(count: int, dly: int = 0):
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delay(count >> 3)
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delay(count >> 3)
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delay(count >> 3)
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delay(count >> 3)
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delay(count >> 3)
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delay(count >> 3)
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self.flasher.spi_pins_set(
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pins['sck'],
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pins['ss'],
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pins['mosi'],
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pins['miso']
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)
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def init():
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if debug:
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print("init")
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enable(1, 1)
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enable(1, 0) # reset high
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sleep(0.15)
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def power_on(self):
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self.flasher.gpio_put(self.pins['5v_en'], True)
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enable(0, 0) # enable and reset high
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sleep(0.12)
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enable(0, 1) # enable low, reset high
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sleep(0.12)
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enable(1, 1) # enable and reset low
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sleep(0.12)
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return True
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def power_off(self):
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self.flasher.gpio_put(self.pins['5v_en'], False)
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def status_wait(count=1000):
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for i in range(0,count):
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tck(5000)
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enable(0)
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x = sendhex("0500")
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enable(1)
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def enable(self,cs,reset=1):
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#gpio.write(cs << cs_pin | reset << reset_pin)
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self.flasher.gpio_put(self.pins['ss'], cs)
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self.flasher.gpio_put(self.pins['crst'], reset)
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#print("x=%04x" %(x))
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def sendhex(self,s):
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if self.debug and not s == "0500": # supress status check messages
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print("TX", s)
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x = bytes.fromhex(s)
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#b = dev.exchange(x, duplex=True, readlen=len(x))
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b = self.flasher.spi_bitbang(x, toggle_cs=False)
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if self.debug and not s == "0500":
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print("RX", b.hex())
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return int.from_bytes(b, byteorder='big')
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def sendhex_cs(self,s):
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if self.debug and not s == "0500":
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print("TX", s)
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x = bytes.fromhex(s)
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#b = dev.exchange(x, duplex=True, readlen=len(x))
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b = self.flasher.spi_bitbang(x)
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if self.debug and not s == "0500":
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print("RX", b.hex())
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return b
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if (x & 0x00c1) == 0:
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return True
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def delay(self,count: int):
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# run the clock with no CS asserted
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#dev.exchange(b'\x00', duplex=True, readlen=count)
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self.sendhex('00' * count)
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print("status failed to clear", file=sys.stdout)
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return False
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def tck(self,count: int):
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self.delay(count >> 3)
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self.delay(count >> 3)
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self.delay(count >> 3)
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self.delay(count >> 3)
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self.delay(count >> 3)
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self.delay(count >> 3)
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def nvcm_command(cmd):
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enable(0)
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sendhex(cmd)
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enable(1)
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if not status_wait():
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return False
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tck(8)
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return True
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def init(self):
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if self.debug:
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print("init")
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self.enable(1, 1)
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self.enable(1, 0) # reset high
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sleep(0.15)
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self.enable(0, 0) # enable and reset high
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sleep(0.12)
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self.enable(0, 1) # enable low, reset high
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sleep(0.12)
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self.enable(1, 1) # enable and reset low
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sleep(0.12)
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return True
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def nvcm_pgm_enable():
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return nvcm_command("06")
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def nvcm_pgm_disable():
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return nvcm_command("04")
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def nvcm_enable_access():
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# ! Shift in Access-NVCM instruction;
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# SMCInstruction[1] = 0x70807E99557E;
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return nvcm_command("7eaa997e010e")
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# Returns a big integer
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def nvcm_read(address, length=8, cmd=0x03):
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enable(0)
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sendhex("%02x%06x" % (cmd, address))
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sendhex("00" * 9) # dummy bytes
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x = 0
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for i in range(0,length):
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x = x << 8 | sendhex("00")
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enable(1)
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return x
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# Returns a byte array of the contents
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def nvcm_read_bytes(address, length=8):
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return nvcm_read(address, length).to_bytes(length, byteorder="big")
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def nvcm_write(address, data, cmd=0x02):
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enable(0)
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sendhex("%02x%06x" % (cmd, address))
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sendhex(data)
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enable(1)
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if not status_wait():
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print("WRITE FAILED: cmd=%02x address=%06x data=%s" % (cmd, address, data.hex()), file=sys.stderr)
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def status_wait(self,count=1000):
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for i in range(0,count):
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self.tck(5000)
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ret = self.sendhex_cs("0500")
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x = int.from_bytes(ret, byteorder='big')
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#print("x=%04x" %(x))
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if (x & 0x00c1) == 0:
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return True
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print("status failed to clear", file=sys.stdout)
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return False
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tck(8)
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return True
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def command(self,cmd):
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self.sendhex_cs(cmd)
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if not self.status_wait():
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return False
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self.tck(8)
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return True
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def nvcm_bank_select(bank):
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return nvcm_write(cmd=0x83, address=0x000025, data="%02x" % (bank))
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def pgm_enable(self):
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return self.command("06")
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def nvcm_select_nvcm():
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# ! Shift in Restore Access-NVCM instruction;
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# SDR 40 TDI(0x00A40000C1);
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return nvcm_bank_select(0x00)
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def pgm_disable(self):
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return self.command("04")
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def nvcm_select_trim():
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# ! Shift in Trim setup-NVCM instruction;
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# SDR 40 TDI(0x08A40000C1);
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return nvcm_bank_select(0x10)
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def enable_access(self):
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# ! Shift in Access-NVCM instruction;
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# SMCInstruction[1] = 0x70807E99557E;
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return self.command("7eaa997e010e")
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def nvcm_select_sig():
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# ! Shift in Access Silicon Signature instruction;
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# IDInstruction[1] = 0x04A40000C1;
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# SDR 40 TDI(IDInstruction[1]);
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return nvcm_bank_select(0x20)
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def read(self, address, length=8, cmd=0x03):
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"""Returns a big integer"""
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# enable(0)
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# sendhex("%02x%06x" % (cmd, address))
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# sendhex("00" * 9) # dummy bytes
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# x = 0
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# for i in range(0,length):
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# x = x << 8 | sendhex("00")
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# enable(1)
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msg = ''
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msg += ("%02x%06x" % (cmd, address))
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msg += ("00" * 9) # dummy bytes
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msg += ("00" * length) # read
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ret = self.sendhex_cs(msg)
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x = 0
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for i in range(0,length):
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x = x << 8 | ret[i + 4+9]
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return x
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def nvcm_read_trim():
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# ! Shift in Access-NVCM instruction;
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# SMCInstruction[1] = 0x70807E99557E;
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if not nvcm_enable_access():
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return
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def read_bytes(self, address, length=8):
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"""Returns a byte array of the contents"""
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return self.read(address, length).to_bytes(length, byteorder="big")
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# ! Shift in READ_RF(0x84) instruction;
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# SDR 104 TDI(0x00000000000000000004000021);
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x = nvcm_read(cmd=0x84, address=0x000020, length=8)
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tck(8)
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def write(self,address, data, cmd=0x02):
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self.sendhex_cs("%02x%06x" % (cmd, address) + data)
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if not self.status_wait():
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print("WRITE FAILED: cmd=%02x address=%06x data=%s" % (cmd, address, data.hex()), file=sys.stderr)
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return False
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self.tck(8)
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return True
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#print("FSM Trim Register %x" % (x))
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def bank_select(self,bank):
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return self.write(cmd=0x83, address=0x000025, data="%02x" % (bank))
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nvcm_select_nvcm()
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return x
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def select_nvcm(self):
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# ! Shift in Restore Access-NVCM instruction;
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# SDR 40 TDI(0x00A40000C1);
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return self.bank_select(0x00)
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def select_trim(self):
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# ! Shift in Trim setup-NVCM instruction;
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# SDR 40 TDI(0x08A40000C1);
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return self.bank_select(0x10)
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def select_sig(self):
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# ! Shift in Access Silicon Signature instruction;
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# IDInstruction[1] = 0x04A40000C1;
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# SDR 40 TDI(IDInstruction[1]);
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return self.bank_select(0x20)
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def nvcm_write_trim(data):
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# ! Setup Programming Parameter in Trim Registers;
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# ! Shift in Trim setup-NVCM instruction;
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# TRIMInstruction[1] = 0x000000430F4FA80004000041;
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return nvcm_write(cmd=0x82, address=0x000020, data=data)
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def read_trim(self):
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# ! Shift in Access-NVCM instruction;
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# SMCInstruction[1] = 0x70807E99557E;
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if not self.enable_access():
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return
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# ! Shift in READ_RF(0x84) instruction;
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# SDR 104 TDI(0x00000000000000000004000021);
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x = self.read(cmd=0x84, address=0x000020, length=8)
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self.tck(8)
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#print("FSM Trim Register %x" % (x))
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self.select_nvcm()
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return x
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def write_trim(self,data):
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# ! Setup Programming Parameter in Trim Registers;
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# ! Shift in Trim setup-NVCM instruction;
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# TRIMInstruction[1] = 0x000000430F4FA80004000041;
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return self.write(cmd=0x82, address=0x000020, data=data)
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def nvcm_enable():
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if debug:
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print("nvcm_enable")
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# ! Shift in Access-NVCM instruction;
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# SMCInstruction[1] = 0x70807E99557E;
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if not nvcm_enable_access():
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return
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def nvcm_enable(self):
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if self.debug:
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print("enable")
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# ! Shift in Access-NVCM instruction;
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# SMCInstruction[1] = 0x70807E99557E;
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if not self.enable_access():
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return
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# ! Setup Reading Parameter in Trim Registers;
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# ! Shift in Trim setup-NVCM instruction;
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# TRIMInstruction[1] = 0x000000230000000004000041;
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if self.debug:
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print("setup_nvcm")
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return self.write_trim("00000000c4000000")
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def enable_trim(self):
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# ! Setup Programming Parameter in Trim Registers;
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# ! Shift in Trim setup-NVCM instruction;
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# TRIMInstruction[1] = 0x000000430F4FA80004000041;
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return self.write_trim("0015f2f0c2000000")
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def disable(self):
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if not self.select_nvcm():
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return
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self.reset(1)
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self.tck(8)
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self.reset(0)
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self.tck(8)
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# ! Setup Reading Parameter in Trim Registers;
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# ! Shift in Trim setup-NVCM instruction;
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# TRIMInstruction[1] = 0x000000230000000004000041;
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if debug:
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print("setup_nvcm")
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return nvcm_write_trim("00000000c4000000")
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def nvcm_enable_trim():
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# ! Setup Programming Parameter in Trim Registers;
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# ! Shift in Trim setup-NVCM instruction;
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# TRIMInstruction[1] = 0x000000430F4FA80004000041;
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return nvcm_write_trim("0015f2f0c2000000")
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def nvcm_disable():
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if not nvcm_select_nvcm():
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return
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reset(1)
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tck(8, 1)
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rest(0)
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tck(8, 2000)
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def nvcm_trim_blank_check():
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print ("NVCM Trim_Parameter_OTP blank check");
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if not nvcm_select_trim():
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return
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x = nvcm_read(0x000020, 1)
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nvcm_select_nvcm()
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if x != 0:
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die ("NVCM Trim_Parameter_OTP Block is not blank. (%02x)" % x);
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return True
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def nvcm_blank_check(total_fuse):
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nvcm_select_nvcm()
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status = True
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print ("NVCM main memory blank check");
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contents = nvcm_read_bytes(0x000000, total_fuse)
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for i in range(0,total_fuse):
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x = contents[i]
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if debug:
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print("%08x: %02x" % (i, x))
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def trim_blank_check(self):
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print ("NVCM Trim_Parameter_OTP blank check");
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if not self.select_trim():
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return
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x = self.read(0x000020, 1)
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self.select_nvcm()
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if x != 0:
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print ("%08x: NVCM Main Memory Block is not blank." % (i), file=sys.stderr)
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status = False
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#break
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die ("NVCM Trim_Parameter_OTP Block is not blank. (%02x)" % x);
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return True
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|
||||
def blank_check(self,total_fuse):
|
||||
self.select_nvcm()
|
||||
|
||||
status = True
|
||||
print ("NVCM main memory blank check");
|
||||
contents = self.read_bytes(0x000000, total_fuse)
|
||||
|
||||
for i in range(0,total_fuse):
|
||||
x = contents[i]
|
||||
if debug:
|
||||
print("%08x: %02x" % (i, x))
|
||||
if x != 0:
|
||||
print ("%08x: NVCM Main Memory Block is not blank." % (i), file=sys.stderr)
|
||||
status = False
|
||||
#break
|
||||
|
||||
self.select_nvcm()
|
||||
return status
|
||||
|
||||
nvcm_select_nvcm()
|
||||
return status
|
||||
def program(self,rows):
|
||||
self.select_nvcm()
|
||||
|
||||
if not self.enable_trim():
|
||||
return False
|
||||
|
||||
print ("NVCM Program main memory")
|
||||
|
||||
if not self.pgm_enable():
|
||||
return False
|
||||
|
||||
status = True
|
||||
|
||||
i = 0
|
||||
for row in rows:
|
||||
if i % 1024 == 0:
|
||||
print("%6d / %6d bytes" % (i, len(rows) * 8))
|
||||
i += 8
|
||||
if not self.command(row):
|
||||
status = False
|
||||
break
|
||||
|
||||
self.pgm_disable()
|
||||
|
||||
if not status:
|
||||
print("PROGRAMMING FAILED", file=sys.stderr)
|
||||
return status
|
||||
|
||||
def nvcm_program(rows):
|
||||
nvcm_select_nvcm()
|
||||
def write_trim_pages(self,lock_bits):
|
||||
if not self.select_nvcm():
|
||||
die("select trim failed")
|
||||
|
||||
if not self.enable_trim():
|
||||
die("write trim command failed")
|
||||
|
||||
if not self.select_trim():
|
||||
die("select trim failed")
|
||||
|
||||
if not self.pgm_enable():
|
||||
die("write enable failed")
|
||||
|
||||
# ! Program Security Bit row 1;
|
||||
# ! Shift in PAGEPGM instruction;
|
||||
# SDR 96 TDI(0x000000008000000C04000040);
|
||||
# ! Program Security Bit row 2;
|
||||
# SDR 96 TDI(0x000000008000000C06000040);
|
||||
# ! Program Security Bit row 3;
|
||||
# SDR 96 TDI(0x000000008000000C05000040);
|
||||
# ! Program Security Bit row 4;
|
||||
# SDR 96 TDI(0x00000000800000C07000040);
|
||||
if not self.write(0x000020, lock_bits):
|
||||
die("trim write 0x20 failed")
|
||||
if not self.write(0x000060, lock_bits):
|
||||
die("trim write 0x60 failed")
|
||||
if not self.write(0x0000a0, lock_bits):
|
||||
die("trim write 0xa0 failed")
|
||||
if not self.write(0x0000e0, lock_bits):
|
||||
die("trim write 0xe0 failed")
|
||||
|
||||
self.pgm_disable()
|
||||
|
||||
# verify a read back
|
||||
x = self.read(0x000020, 8)
|
||||
|
||||
self.select_nvcm()
|
||||
|
||||
lock_bits = int(lock_bits,16)
|
||||
if x & lock_bits != lock_bits:
|
||||
die("Failed to write trim lock bits: %016x != expected %016x" % (x,lock_bits))
|
||||
|
||||
print("New state %016x" % (x))
|
||||
return True
|
||||
|
||||
if not nvcm_enable_trim():
|
||||
return False
|
||||
|
||||
print ("NVCM Program main memory")
|
||||
|
||||
if not nvcm_pgm_enable():
|
||||
return False
|
||||
|
||||
status = True
|
||||
|
||||
i = 0
|
||||
for row in rows:
|
||||
if i % 1024 == 0:
|
||||
print("%6d / %6d bytes" % (i, len(rows) * 8))
|
||||
i += 8
|
||||
if not nvcm_command(row):
|
||||
status = False
|
||||
break
|
||||
|
||||
nvcm_pgm_disable()
|
||||
|
||||
if not status:
|
||||
print("PROGRAMMING FAILED", file=sys.stderr)
|
||||
return status
|
||||
|
||||
def nvcm_write_trim_pages(lock_bits):
|
||||
if not nvcm_select_nvcm():
|
||||
die("select trim failed")
|
||||
|
||||
if not nvcm_enable_trim():
|
||||
die("write trim command failed")
|
||||
|
||||
if not nvcm_select_trim():
|
||||
die("select trim failed")
|
||||
|
||||
if not nvcm_pgm_enable():
|
||||
die("write enable failed")
|
||||
|
||||
# ! Program Security Bit row 1;
|
||||
# ! Shift in PAGEPGM instruction;
|
||||
# SDR 96 TDI(0x000000008000000C04000040);
|
||||
# ! Program Security Bit row 2;
|
||||
# SDR 96 TDI(0x000000008000000C06000040);
|
||||
# ! Program Security Bit row 3;
|
||||
# SDR 96 TDI(0x000000008000000C05000040);
|
||||
# ! Program Security Bit row 4;
|
||||
# SDR 96 TDI(0x00000000800000C07000040);
|
||||
if not nvcm_write(0x000020, lock_bits):
|
||||
die("trim write 0x20 failed")
|
||||
if not nvcm_write(0x000060, lock_bits):
|
||||
die("trim write 0x60 failed")
|
||||
if not nvcm_write(0x0000a0, lock_bits):
|
||||
die("trim write 0xa0 failed")
|
||||
if not nvcm_write(0x0000e0, lock_bits):
|
||||
die("trim write 0xe0 failed")
|
||||
|
||||
nvcm_pgm_disable()
|
||||
|
||||
# verify a read back
|
||||
x = nvcm_read(0x000020, 8)
|
||||
|
||||
nvcm_select_nvcm()
|
||||
|
||||
lock_bits = int(lock_bits,16)
|
||||
if x & lock_bits != lock_bits:
|
||||
die("Failed to write trim lock bits: %016x != expected %016x" % (x,lock_bits))
|
||||
|
||||
print("New state %016x" % (x))
|
||||
return True
|
||||
|
||||
def nvcm_trim_secure():
|
||||
print ("NVCM Secure")
|
||||
trim = nvcm_read_trim()
|
||||
if (trim >> 60) & 0x3 != 0:
|
||||
print("NVCM already secure? trim=%016x" % (trim), file=sys.stderr)
|
||||
|
||||
return nvcm_write_trim_pages("3000000100000000")
|
||||
def trim_secure(self):
|
||||
print ("NVCM Secure")
|
||||
trim = self.read_trim()
|
||||
if (trim >> 60) & 0x3 != 0:
|
||||
print("NVCM already secure? trim=%016x" % (trim), file=sys.stderr)
|
||||
|
||||
return self.write_trim_pages("3000000100000000")
|
||||
|
||||
|
||||
def nvcm_trim_program():
|
||||
print ("NVCM Program Trim_Parameter_OTP");
|
||||
return nvcm_write_trim_pages("0015f2f1c4000000")
|
||||
def trim_program(self):
|
||||
print ("NVCM Program Trim_Parameter_OTP");
|
||||
return self.write_trim_pages("0015f2f1c4000000")
|
||||
|
||||
def nvcm_info():
|
||||
nvcm_select_sig()
|
||||
sig1 = nvcm_read(0x000000, 8)
|
||||
def info(self):
|
||||
self.select_sig()
|
||||
sig1 = self.read(0x000000, 8)
|
||||
|
||||
self.select_sig()
|
||||
sig2 = self.read(0x000008, 8)
|
||||
|
||||
# have to switch back to nvcm bank before switching to trim?
|
||||
self.select_nvcm()
|
||||
trim = self.read_trim()
|
||||
|
||||
self.select_nvcm()
|
||||
|
||||
self.select_trim()
|
||||
trim0 = self.read(0x000020, 8)
|
||||
|
||||
self.select_trim()
|
||||
trim1 = self.read(0x000060, 8)
|
||||
|
||||
self.select_trim()
|
||||
trim2 = self.read(0x0000a0, 8)
|
||||
|
||||
self.select_trim()
|
||||
trim3 = self.read(0x0000e0, 8)
|
||||
|
||||
self.select_nvcm()
|
||||
|
||||
secured = ((trim >> 60) & 0x3)
|
||||
device_id = (sig1 >> 56) & 0xFF
|
||||
|
||||
print("Device: %s (%02x) secure=%d" % (
|
||||
self.id_table.get(device_id, "Unknown"),
|
||||
device_id,
|
||||
secured
|
||||
))
|
||||
print("Sig 0: %016x" % (sig1))
|
||||
print("Sig 1: %016x" % (sig2))
|
||||
|
||||
|
||||
print("TrimRF: %016x" % (trim))
|
||||
print("Trim 0: %016x" % (trim0))
|
||||
print("Trim 1: %016x" % (trim1))
|
||||
print("Trim 2: %016x" % (trim2))
|
||||
print("Trim 3: %016x" % (trim3))
|
||||
|
||||
return True
|
||||
|
||||
nvcm_select_sig()
|
||||
sig2 = nvcm_read(0x000008, 8)
|
||||
|
||||
# have to switch back to nvcm bank before switching to trim?
|
||||
nvcm_select_nvcm()
|
||||
trim = nvcm_read_trim()
|
||||
|
||||
nvcm_select_nvcm()
|
||||
|
||||
nvcm_select_trim()
|
||||
trim0 = nvcm_read(0x000020, 8)
|
||||
|
||||
nvcm_select_trim()
|
||||
trim1 = nvcm_read(0x000060, 8)
|
||||
|
||||
nvcm_select_trim()
|
||||
trim2 = nvcm_read(0x0000a0, 8)
|
||||
|
||||
nvcm_select_trim()
|
||||
trim3 = nvcm_read(0x0000e0, 8)
|
||||
|
||||
nvcm_select_nvcm()
|
||||
|
||||
secured = ((trim >> 60) & 0x3)
|
||||
device_id = (sig1 >> 56) & 0xFF
|
||||
|
||||
print("Device: %s (%02x) secure=%d" % (
|
||||
nvcm_id_table.get(device_id, "Unknown"),
|
||||
device_id,
|
||||
secured
|
||||
))
|
||||
print("Sig 0: %016x" % (sig1))
|
||||
print("Sig 1: %016x" % (sig2))
|
||||
|
||||
|
||||
print("TrimRF: %016x" % (trim))
|
||||
print("Trim 0: %016x" % (trim0))
|
||||
print("Trim 1: %016x" % (trim1))
|
||||
print("Trim 2: %016x" % (trim2))
|
||||
print("Trim 3: %016x" % (trim3))
|
||||
|
||||
return True
|
||||
|
||||
def nvcm_read_file(filename):
|
||||
nvcm_select_nvcm()
|
||||
|
||||
total_fuse = 104090
|
||||
|
||||
contents = b''
|
||||
|
||||
for offset in range(0,total_fuse,8):
|
||||
if offset % 1024 == 0:
|
||||
print("%6d / %6d bytes" % (offset, total_fuse))
|
||||
contents += nvcm_read_bytes(offset, 8)
|
||||
|
||||
if filename == '-':
|
||||
with os.fdopen(sys.stdout.fileno(), "wb", closefd=False) as f:
|
||||
f.write(contents)
|
||||
f.flush()
|
||||
else:
|
||||
with open(filename, "wb") as f:
|
||||
f.write(contents)
|
||||
f.flush()
|
||||
def read_file(self,filename):
|
||||
self.select_nvcm()
|
||||
|
||||
total_fuse = 104090
|
||||
|
||||
contents = b''
|
||||
|
||||
for offset in range(0,total_fuse,8):
|
||||
if offset % 1024 == 0:
|
||||
print("%6d / %6d bytes" % (offset, total_fuse))
|
||||
contents += self.read_bytes(offset, 8)
|
||||
|
||||
if filename == '-':
|
||||
with os.fdopen(sys.stdout.fileno(), "wb", closefd=False) as f:
|
||||
f.write(contents)
|
||||
f.flush()
|
||||
else:
|
||||
with open(filename, "wb") as f:
|
||||
f.write(contents)
|
||||
f.flush()
|
||||
|
||||
|
||||
#
|
||||
@ -456,58 +502,55 @@ def bitstream2nvcm(bitstream):
|
||||
|
||||
return rows
|
||||
|
||||
def sleep_flash():
|
||||
def sleep_flash(pins):
|
||||
flasher = usb_test.ice40_flasher()
|
||||
|
||||
# Disable board power
|
||||
flasher.gpio_put(tp1_pins['5v_en'], False)
|
||||
flasher.gpio_set_direction(tp1_pins['5v_en'], True)
|
||||
flasher.gpio_put(pins['5v_en'], False)
|
||||
flasher.gpio_set_direction(pins['5v_en'], True)
|
||||
|
||||
# Pull CRST low to prevent FPGA from starting
|
||||
flasher.gpio_set_direction(tp1_pins['crst'], True)
|
||||
flasher.gpio_put(tp1_pins['crst'], False)
|
||||
flasher.gpio_set_direction(pins['crst'], True)
|
||||
flasher.gpio_put(pins['crst'], False)
|
||||
|
||||
# Enable board power
|
||||
flasher.gpio_put(tp1_pins['5v_en'], True)
|
||||
flasher.gpio_put(pins['5v_en'], True)
|
||||
|
||||
# Configure pins for talking to flash
|
||||
flasher.gpio_set_direction(tp1_pins['ss'], True)
|
||||
flasher.gpio_set_direction(tp1_pins['mosi'], False)
|
||||
flasher.gpio_set_direction(tp1_pins['sck'], True)
|
||||
flasher.gpio_set_direction(tp1_pins['miso'], True)
|
||||
flasher.gpio_set_direction(pins['ss'], True)
|
||||
flasher.gpio_set_direction(pins['mosi'], False)
|
||||
flasher.gpio_set_direction(pins['sck'], True)
|
||||
flasher.gpio_set_direction(pins['miso'], True)
|
||||
|
||||
flasher.gpio_put(tp1_pins['ss'], False)
|
||||
flasher.spi_bitbang(sck_pin=tp1_pins['sck'], mosi_pin=tp1_pins['miso'], miso_pin=tp1_pins['mosi'], buf=[0xAB])
|
||||
flasher.gpio_put(tp1_pins['ss'], True)
|
||||
flasher.spi_pins_set(
|
||||
pins['sck'],
|
||||
pins['ss'],
|
||||
pins['miso'],
|
||||
pins['mosi']
|
||||
)
|
||||
|
||||
flasher.spi_bitbang([0xAB])
|
||||
|
||||
# Confirm we can talk to flash
|
||||
flasher.gpio_put(tp1_pins['ss'], False)
|
||||
data = flasher.spi_bitbang(sck_pin=tp1_pins['sck'], mosi_pin=tp1_pins['miso'], miso_pin=tp1_pins['mosi'], buf=[0x9f, 0,0])
|
||||
flasher.gpio_put(tp1_pins['ss'], True)
|
||||
data = flasher.spi_bitbang([0x9f, 0,0])
|
||||
|
||||
print('flash ID while awake:', ' '.join(['{:02x}'.format(b) for b in data]))
|
||||
assert(data == bytes([0xff, 0xef, 0x40]))
|
||||
|
||||
# Test that the flash will ignore a sleep command that doesn't start on the first byte
|
||||
flasher.gpio_put(tp1_pins['ss'], False)
|
||||
flasher.spi_bitbang(sck_pin=tp1_pins['sck'], mosi_pin=tp1_pins['miso'], miso_pin=tp1_pins['mosi'], buf=[0, 0xb9])
|
||||
flasher.gpio_put(tp1_pins['ss'], True)
|
||||
flasher.spi_bitbang([0, 0xb9])
|
||||
|
||||
# Confirm we can talk to flash
|
||||
flasher.gpio_put(tp1_pins['ss'], False)
|
||||
data = flasher.spi_bitbang(sck_pin=tp1_pins['sck'], mosi_pin=tp1_pins['miso'], miso_pin=tp1_pins['mosi'], buf=[0x9f, 0,0])
|
||||
flasher.gpio_put(tp1_pins['ss'], True)
|
||||
data = flasher.spi_bitbang([0x9f, 0,0])
|
||||
|
||||
print('flash ID while awake:', ' '.join(['{:02x}'.format(b) for b in data]))
|
||||
assert(data == bytes([0xff, 0xef, 0x40]))
|
||||
|
||||
# put the flash to sleep
|
||||
flasher.gpio_put(tp1_pins['ss'], False)
|
||||
flasher.spi_bitbang(sck_pin=tp1_pins['sck'], mosi_pin=tp1_pins['miso'], miso_pin=tp1_pins['mosi'], buf=[0xb9])
|
||||
flasher.gpio_put(tp1_pins['ss'], True)
|
||||
flasher.spi_bitbang([0xb9])
|
||||
|
||||
# Confirm flash is asleep
|
||||
flasher.gpio_put(tp1_pins['ss'], False)
|
||||
data = flasher.spi_bitbang(sck_pin=tp1_pins['sck'], mosi_pin=tp1_pins['miso'], miso_pin=tp1_pins['mosi'], buf=[0x9f, 0,0])
|
||||
flasher.gpio_put(tp1_pins['ss'], True)
|
||||
data = flasher.spi_bitbang(buf=[0x9f, 0,0])
|
||||
|
||||
print('flash ID while asleep:', ' '.join(['{:02x}'.format(b) for b in data]))
|
||||
assert(data == bytes([0xff, 0xff, 0xff]))
|
||||
@ -573,7 +616,6 @@ if __name__ == "__main__":
|
||||
|
||||
args = parser.parse_args()
|
||||
|
||||
debug = args.verbose
|
||||
|
||||
if not args.good_enough \
|
||||
and (args.write_file or args.set_secure):
|
||||
@ -582,7 +624,6 @@ if __name__ == "__main__":
|
||||
|
||||
# Instantiate a SPI controller, with separately managed CS line
|
||||
#spi = SpiController()
|
||||
flasher = usb_test.ice40_flasher()
|
||||
|
||||
# Configure the first interface (IF/1) of the FTDI device as a SPI controller
|
||||
#spi.configure(args.port)
|
||||
@ -600,6 +641,11 @@ if __name__ == "__main__":
|
||||
#gpio.set_direction(1 << reset_pin | 1 << cs_pin, 1 << reset_pin | 1 << cs_pin)
|
||||
|
||||
# Enable power to the FPGA, then set both reset and CS pins high
|
||||
|
||||
# # Reset pin values
|
||||
# for pin in tp1_pins:
|
||||
# flasher.gpio_set_direction(tp1_pins[pin], False)
|
||||
|
||||
tp1_pins = {
|
||||
'5v_en' : 7,
|
||||
'sck' : 10,
|
||||
@ -610,30 +656,18 @@ if __name__ == "__main__":
|
||||
'cdne' : 15
|
||||
}
|
||||
|
||||
# # Reset pin values
|
||||
# for pin in tp1_pins:
|
||||
# flasher.gpio_set_direction(tp1_pins[pin], False)
|
||||
|
||||
if args.sleep_flash:
|
||||
sleep_flash()
|
||||
sleep_flash(tp1_pins)
|
||||
|
||||
# Configure pins for talking to ice40
|
||||
flasher.gpio_set_direction(tp1_pins['ss'], True)
|
||||
flasher.gpio_set_direction(tp1_pins['mosi'], True)
|
||||
flasher.gpio_set_direction(tp1_pins['sck'], True)
|
||||
flasher.gpio_set_direction(tp1_pins['miso'], False)
|
||||
nvcm = Nvcm(tp1_pins, debug=args.verbose)
|
||||
nvcm.power_on()
|
||||
|
||||
# # Turn on ICE40 in CRAM boot mode
|
||||
|
||||
enable(1, 0) # enable and reset high
|
||||
sleep(0.2)
|
||||
enable(1, 1) # enable low, reset high
|
||||
|
||||
init() or exit(1)
|
||||
nvcm_enable() or exit(1)
|
||||
nvcm.init() or exit(1)
|
||||
nvcm.nvcm_enable() or exit(1)
|
||||
|
||||
if args.read_info:
|
||||
nvcm_info() or exit(1)
|
||||
nvcm.info() or exit(1)
|
||||
|
||||
if args.write_file:
|
||||
with open(args.write_file, "rb") as f:
|
||||
@ -644,25 +678,25 @@ if __name__ == "__main__":
|
||||
exit(1)
|
||||
|
||||
if not args.ignore_blank:
|
||||
nvcm_trim_blank_check() or exit(1)
|
||||
nvcm.trim_blank_check() or exit(1)
|
||||
# how much should we check?
|
||||
nvcm_blank_check(0x100) or exit(1)
|
||||
nvcm.blank_check(0x100) or exit(1)
|
||||
|
||||
# this is it!
|
||||
nvcm_program(cmds) or exit(1)
|
||||
nvcm.program(cmds) or exit(1)
|
||||
|
||||
# update the trim to boot from nvcm
|
||||
nvcm_trim_program() or exit(1)
|
||||
nvcm.trim_program() or exit(1)
|
||||
|
||||
if args.read_file:
|
||||
# read back after writing to the NVCM
|
||||
nvcm_read_file(args.read_file) or exit(1)
|
||||
nvcm.read_file(args.read_file) or exit(1)
|
||||
|
||||
if args.set_secure:
|
||||
nvcm_trim_secure() or exit(1)
|
||||
nvcm.trim_secure() or exit(1)
|
||||
|
||||
if args.do_boot:
|
||||
# hold reset low for half a second
|
||||
enable(1,0)
|
||||
nvcm.enable(1,0)
|
||||
sleep(0.5)
|
||||
enable(1,1)
|
||||
nvcm.enable(1,1)
|
||||
|
||||
@ -9,8 +9,11 @@ class ice40_flasher:
|
||||
FLASHER_REQUEST_PULLUPS_SET = 0x12
|
||||
FLASHER_REQUEST_PIN_VALUES_SET = 0x20
|
||||
FLASHER_REQUEST_PIN_VALUES_GET = 0x30
|
||||
FLASHER_REQUEST_SPI_BITBANG = 0x40
|
||||
FLASHER_REQUEST_SPI_BITBANG_CS = 0x41
|
||||
FLASHER_REQUEST_SPI_BITBANG_NO_CS = 0x42
|
||||
FLASHER_REQUEST_SPI_PINS_SET = 0x43
|
||||
FLASHER_REQUEST_ADC_READ = 0x50
|
||||
FLASHER_REQUEST_BOOTLOADRE = 0xFF
|
||||
|
||||
def __init__(self):
|
||||
# self.dev = None
|
||||
@ -32,10 +35,16 @@ class ice40_flasher:
|
||||
#self.dev.close()
|
||||
pass
|
||||
|
||||
def _write(self, request_id, data):
|
||||
def _write(self, request_id: int, data: bytes):
|
||||
self.dev.ctrl_transfer(0x40, request_id,0,0,data)
|
||||
|
||||
def _read(self, request_id, length):
|
||||
def _write_bulk(self, request_id: int, data: bytes):
|
||||
msg = bytearray()
|
||||
msg.append(request_id)
|
||||
msg.extend(data)
|
||||
self.dev.write(0x01, data)
|
||||
|
||||
def _read(self, request_id: int, length: int) -> bytes:
|
||||
#ctrl_transfer(self, bmRequestType, bRequest, wValue=0, wIndex=0, data_or_wLength = None, timeout = None):
|
||||
# Request type:
|
||||
# bit 7: direction 0:host to device (OUT), 1: device to host (IN)
|
||||
@ -44,21 +53,6 @@ class ice40_flasher:
|
||||
ret = self.dev.ctrl_transfer(0xC0, request_id,0,0,length)
|
||||
return ret
|
||||
|
||||
# def led_set(self, value: bool) -> None:
|
||||
# """Set the state of the onboard LED
|
||||
|
||||
# Keyword arguments:
|
||||
# value -- True: On, False: Off
|
||||
# """
|
||||
# msg = struct.pack('>BBB',
|
||||
# 0x0,
|
||||
# 0x00,
|
||||
# (1 if value else 0)
|
||||
# )
|
||||
|
||||
# #print(['{:02x}'.format(b) for b in msg])
|
||||
# self.dev.write(msg)
|
||||
|
||||
def gpio_set_direction(self, pin: int, direction: bool) -> None:
|
||||
"""Set the direction of a single GPIO pin
|
||||
|
||||
@ -71,6 +65,7 @@ class ice40_flasher:
|
||||
((1 if direction else 0)<<pin),
|
||||
)
|
||||
|
||||
#self._write_bulk(self.FLASHER_REQUEST_PIN_DIRECTION_SET, msg)
|
||||
self._write(self.FLASHER_REQUEST_PIN_DIRECTION_SET, msg)
|
||||
|
||||
def gpio_set_pulls(self, pin: int, pullup: bool, pulldown: bool) -> None:
|
||||
@ -121,23 +116,39 @@ class ice40_flasher:
|
||||
|
||||
return ((gpio_states >> pin) & 0x01) == 0x01
|
||||
|
||||
def spi_bitbang(
|
||||
def spi_pins_set(
|
||||
self,
|
||||
sck_pin: int,
|
||||
cs_pin: int,
|
||||
mosi_pin: int,
|
||||
miso_pin: int,
|
||||
buf: bytearray) -> bytearray:
|
||||
"""Bitbang a SPI transfer using the specificed GPIO pins
|
||||
|
||||
Note that this command does not handle setting a CS pin, that must be accomplished
|
||||
separately, for instance by calling gpio_set() on the pin controlling the CS line.
|
||||
miso_pin: int) -> None:
|
||||
"""Set the pins to use for SPI transfers
|
||||
|
||||
Keyword arguments:
|
||||
sck_pin -- GPIO pin number to use as the SCK signal
|
||||
cs_pin -- GPIO pin number to use as the CS signal
|
||||
mosi_pin -- GPIO pin number to use as the MOSI signal
|
||||
miso_pin -- GPIO pin number to use as the MISO signal
|
||||
"""
|
||||
header = struct.pack('>BBBB',
|
||||
sck_pin,
|
||||
cs_pin,
|
||||
mosi_pin,
|
||||
miso_pin)
|
||||
msg = bytearray()
|
||||
msg.extend(header)
|
||||
|
||||
self._write(self.FLASHER_REQUEST_SPI_PINS_SET,msg)
|
||||
|
||||
def spi_bitbang(
|
||||
self,
|
||||
buf: bytearray,
|
||||
toggle_cs: bool = True) -> bytearray:
|
||||
"""Bitbang a SPI transfer
|
||||
|
||||
Keyword arguments:
|
||||
buf -- Byte buffer to send. If the bit_count is smaller than the buffer size, some data will not be sent.
|
||||
bit_count -- (Optional) Number of bits (not bytes) to bitbang. If left unspecificed, defaults to the size of buf.
|
||||
toggle_cs: (Optional) If true, toggle the CS line
|
||||
"""
|
||||
|
||||
ret = bytearray()
|
||||
@ -147,31 +158,25 @@ class ice40_flasher:
|
||||
chunk = buf[i:i + max_chunk_size]
|
||||
ret.extend(
|
||||
self.spi_bitbang_inner(
|
||||
sck_pin=sck_pin,
|
||||
mosi_pin=mosi_pin,
|
||||
miso_pin=miso_pin,
|
||||
buf=chunk))
|
||||
buf=chunk,
|
||||
toggle_cs=toggle_cs))
|
||||
|
||||
return ret
|
||||
|
||||
def spi_bitbang_inner(
|
||||
self,
|
||||
sck_pin: int,
|
||||
mosi_pin: int,
|
||||
miso_pin: int,
|
||||
buf: bytearray,
|
||||
bit_count: int = -1) -> bytearray:
|
||||
bit_count: int = -1,
|
||||
toggle_cs: bool = True) -> bytearray:
|
||||
"""Bitbang a SPI transfer using the specificed GPIO pins
|
||||
|
||||
Note that this command does not handle setting a CS pin, that must be accomplished
|
||||
separately, for instance by calling gpio_set() on the pin controlling the CS line.
|
||||
|
||||
Keyword arguments:
|
||||
sck_pin -- GPIO pin number to use as the SCK signal
|
||||
mosi_pin -- GPIO pin number to use as the MOSI signal
|
||||
miso_pin -- GPIO pin number to use as the MISO signal
|
||||
buf -- Byte buffer to send. If the bit_count is smaller than the buffer size, some data will not be sent.
|
||||
bit_count -- (Optional) Number of bits (not bytes) to bitbang. If left unspecificed, defaults to the size of buf.
|
||||
toggle_cs: (Optional) If true, toggle the CS line
|
||||
"""
|
||||
if bit_count == -1:
|
||||
bit_count = len(buf) * 8
|
||||
@ -188,18 +193,18 @@ class ice40_flasher:
|
||||
len(buf) * 8)
|
||||
exit(1)
|
||||
|
||||
header = struct.pack('>BBBI',
|
||||
sck_pin,
|
||||
mosi_pin,
|
||||
miso_pin,
|
||||
header = struct.pack('>I',
|
||||
bit_count)
|
||||
msg = bytearray()
|
||||
msg.extend(header)
|
||||
msg.extend(buf)
|
||||
|
||||
self._write(self.FLASHER_REQUEST_SPI_BITBANG,msg)
|
||||
|
||||
msg_in = self._read(self.FLASHER_REQUEST_SPI_BITBANG, byte_length)
|
||||
if toggle_cs:
|
||||
self._write(self.FLASHER_REQUEST_SPI_BITBANG_CS,msg)
|
||||
msg_in = self._read(self.FLASHER_REQUEST_SPI_BITBANG_CS, byte_length)
|
||||
else:
|
||||
self._write(self.FLASHER_REQUEST_SPI_BITBANG_NO_CS,msg)
|
||||
msg_in = self._read(self.FLASHER_REQUEST_SPI_BITBANG_NO_CS, byte_length)
|
||||
|
||||
return msg_in
|
||||
|
||||
@ -232,15 +237,6 @@ if __name__ == '__main__':
|
||||
|
||||
|
||||
buf = [0x01,0x02,0x03, 0xFE]
|
||||
header = struct.pack('>BBBI',
|
||||
10,
|
||||
11,
|
||||
13,
|
||||
len(buf)*8)
|
||||
msg = bytearray()
|
||||
msg.extend(header)
|
||||
msg.extend(buf)
|
||||
|
||||
while True:
|
||||
|
||||
flasher.spi_bitbang_inner(sck_pin=10, mosi_pin=11, miso_pin=13, buf=buf)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user