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2,766 Commits 2 Branches 495 Tags 490 MiB
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Author SHA1 Message Date
Jared Boone
18b272bcab Add PCB dimensions 2015-08-30 16:24:07 -07:00
Jared Boone
d3acd79df8 Add PCB stack data and diagram. 2015-08-30 16:23:55 -07:00
Jared Boone
375cf6f238 Tighten solder mask around LCD connector. 
Shooting for 4mil mask web between pads.
 2015-08-30 14:35:04 -07:00
Jared Boone
84b92365f9 Move and shrink copper layer legend. 
Doesn't need to be visible after assembly. I think.
 2015-08-30 10:14:36 -07:00
Jared Boone
ea2cfb7ad2 Center text in layer legend. 2015-08-30 09:42:47 -07:00
Jared Boone
732561d01c Change vias to 13mil, 7mil annular ring. 
Was 13.5mm, but why?!?
 2015-08-29 22:31:29 -07:00
Jared Boone
1340991dba Reduce solder mask margin on WM8731. 
Trying to squeeze some mask web in there!
 2015-08-29 18:14:23 -07:00
Jared Boone
56c7c31cbb More footprint units cleanup. 2015-08-29 17:54:26 -07:00
Jared Boone
bda376df4b KiCad added courtyard layers. 2015-08-29 17:20:41 -07:00
Jared Boone
436e6fd21b Footprint cleanup 
Remove courtyard lines from silkscreen.
Round coordinates/dimensions to correct values (KiCad's old units don't convert nicely to the new units).
Restore U3 refdes silkscreen visibility.
 2015-08-29 17:14:06 -07:00
Jared Boone
c78b7fe196 Reduce mask margin on QFP pads. 2015-08-29 16:12:45 -07:00
furrtek
5468917da6 Merge branch 'master' of https://github.com/furrtek/portapack-hackrf 2015-08-28 20:52:15 +02:00
furrtek
0e0261f813 LCR in TEDI 1200/2400 AFSK transmit 2015-08-28 20:50:42 +02:00
Jared Boone
d61f3802cb Remove line in/out components and traces, microphone. 
Clean up traces and via stitching affected by removed components.
 2015-08-27 16:54:38 -07:00
Jared Boone
29243a5fd1 Schematic and netlist from schematic modifications. 2015-08-27 16:54:38 -07:00
Jared Boone
70d7ecc51b Clean up PCB net labels to match code, CPLD. 2015-08-27 16:54:38 -07:00
Jared Boone
75d9aa9c73 Remove extra CPLD code internal signals. 2015-08-27 16:54:38 -07:00
Jared Boone
19764ce693 Swap function of P2_8, P2_4 in schematic, firmware, CPLD. 
gpio_unused: P2_4 -> P2_8
gpio_lcd_rd: P2_8 -> P2_4
P2_8 is a very long line, shared with DFU button.
Revise schematic to match CPLD signal names.
 2015-08-27 16:54:38 -07:00
Jared Boone
b6e25692dc Label 1V8 regulator bypass/adjust capacitor as DNI. 
Was already DNI in assembly BOM. TCR2EF shows that pin as NC.
 2015-08-27 16:54:38 -07:00
Jared Boone
1ca4f45d9e Change VBAT capacitor to DNI. 
HackRF One has 100nF capacitor on VBAT. Having 10uF capacitor on PortaPack VBAT may slowly drain the coin cell when in storage, and add a bit of leakage current when installed.
 2015-08-27 16:54:38 -07:00
Jared Boone
8dfd68a6b3 Removed electret microphone. 2015-08-27 16:54:37 -07:00
Jared Boone
cd4840f1f9 Remove line in/out circuitry. 2015-08-27 16:54:37 -07:00
Jared Boone
84ffaaef33 Back-annotate CVPCB data into schematic. 
Remove CVPCB .cmp file, since it's a deprecated by the KiCad project.
 2015-08-27 16:54:37 -07:00
Jared Boone
bf4521bf35 Update schematic issue/copyright date. 
KiCad also made some automatic tweaks for latest build (bzr 6109).
 2015-08-27 16:54:37 -07:00
Jared Boone
3fea68d777 Adjust wideband specan gain to match other modes. 2015-08-27 14:57:05 -07:00
Jared Boone
b13081696d Simplify MessageQueue pop() usage. 2015-08-27 14:35:17 -07:00
Jared Boone
d8b3b4cb6b Check queue empty only once when reading messages. 
There was a second is_empty() call hidden in the pop() call, so the while(condition) was redundant.
 2015-08-27 14:27:29 -07:00
Jared Boone
5d9079f87f Stop streaming when changing baseband configuration. 
Without, the baseband would get confused.
 2015-08-27 14:07:15 -07:00
Jared Boone
e751e10e45 Add wideband spectrum processor. 2015-08-27 13:57:31 -07:00
Jared Boone
23ac04ad56 Make channel spectrum members protected, not private. 2015-08-27 13:51:55 -07:00
Jared Boone
c7907e948c Extract FSKProcessor into separate files. 2015-08-27 13:31:39 -07:00
Jared Boone
ffe829cf67 Extract WidebandFMAudio into separate files. 2015-08-27 13:19:34 -07:00
Jared Boone
7c5db55f8f Extract NarrowbandFMAudio into separate files. 2015-08-27 13:14:45 -07:00
Jared Boone
e246ea2c39 Extract NarrowbandAMAudio class into separate files. 2015-08-27 13:07:07 -07:00
Jared Boone
6bf61cbe88 Extract BasebandProcessor into separate files. 2015-08-27 11:11:08 -07:00
Jared Boone
b0e9afe26c Add missing #includes. 2015-08-27 11:10:44 -07:00
Jared Boone
04d05368c7 Push static variables and spectrum calc into BasebandProcessor. 2015-08-27 10:48:29 -07:00
Jared Boone
de0777f476 Extract FMSquelch into separate files. 2015-08-27 09:59:03 -07:00
Jared Boone
b904971ef2 Extract IIR filter configurations into separate file. 2015-08-27 09:58:37 -07:00
Jared Boone
c92bf12fbd Extract ChannelDecimator into separate files. 2015-08-27 09:49:14 -07:00
Jared Boone
035ec84f04 Wrap MessageQueue.push() with mutex. 
This addresses issue #61, occasional FIFO/data corruption. With the mutex, any thread on one core can write to the FIFO. But still, only one thread on one core should read from the FIFO.
 2015-08-26 14:18:03 -07:00
Jared Boone
7937ea7327 Enable DMB instruction at end of FIFO data copy. 
Can't hurt to make sure FIFO and buffer state are flushed before returning to caller...
 2015-08-26 14:13:51 -07:00
Jared Boone
4974774f82 Simplify PLL math when correcting for PPM. 2015-08-25 17:56:03 -07:00
Jared Boone
98773cb62a Make GIT_REVISION value available within code. 
Addresses issue #59.
No idea what it'll do if the commit is also tagged as a release...
 2015-08-25 16:33:52 -07:00
Jared Boone
4fe145b61d Remove application kludge to strip DFU of header. 
Strip the header in in the Python SPI image generator, instead.
 2015-08-25 15:11:22 -07:00
Jared Boone
f7ced7a823 Support Python 3.x in make_spi_image.py. 2015-08-25 14:56:50 -07:00
Jared Boone
dfe0bd7366 Generate SPI flash image with Python, not dd/cat/head. 
Addresses issue #42.
Windows users now stand a chance of being able to build an image, and all these zero-byte HackRF binary issues should go away.
 2015-08-25 14:30:38 -07:00
Furrtek
282662e958 Update README.md 2015-08-25 00:14:03 +02:00
Jared Boone
8f326e2d8e Use PPB correction to adjust clock generator XTAL PLLA frequency. 
Addresses issue #40.
 2015-08-24 12:11:33 -07:00
Jared Boone
fe7dcdc613 Function to adjust clock generator XTAL PLL frequency. 
Needed to switch PLLA to operate in fractional mode.
 2015-08-24 12:09:11 -07:00