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Optional code to disable baseband DMA synchronization.
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1 changed files with 10 additions and 3 deletions
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@ -115,9 +115,16 @@ static void dma_error() {
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void init() {
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void init() {
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gpdma_channel_sgpio.set_handlers(transfer_complete, dma_error);
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gpdma_channel_sgpio.set_handlers(transfer_complete, dma_error);
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#if defined(PORTAPACK_BASEBAND_DMA_NO_SYNC)
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// LPC_GPDMA->SYNC |= (1 << gpdma_src_peripheral);
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/* Disable synchronization logic to improve(?) DMA response time.
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// LPC_GPDMA->SYNC |= (1 << gpdma_dest_peripheral);
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* SGPIO (peripheral) must be on same clock as GPDMA peripheral.
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* SGPIO runs from BASE_PERIPH_CLK, which is set to PLL1 in normal
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* operation, same as the M4 and M0 cores. Memory, of course, is
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* running from the same clock as the cores.
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*/
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LPC_GPDMA->SYNC |= (1 << gpdma_src_peripheral);
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LPC_GPDMA->SYNC |= (1 << gpdma_dest_peripheral);
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#endif
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}
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}
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void configure(
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void configure(
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