diff --git a/firmware/baseband/baseband_dma.cpp b/firmware/baseband/baseband_dma.cpp
index f5dcca1e..d86bef72 100644
--- a/firmware/baseband/baseband_dma.cpp
+++ b/firmware/baseband/baseband_dma.cpp
@@ -115,9 +115,16 @@ static void dma_error() {
 
 void init() {
 	gpdma_channel_sgpio.set_handlers(transfer_complete, dma_error);
-
-	// LPC_GPDMA->SYNC |= (1 << gpdma_src_peripheral);
-	// LPC_GPDMA->SYNC |= (1 << gpdma_dest_peripheral);
+#if defined(PORTAPACK_BASEBAND_DMA_NO_SYNC)
+	/* Disable synchronization logic to improve(?) DMA response time.
+	 * SGPIO (peripheral) must be on same clock as GPDMA peripheral.
+	 * SGPIO runs from BASE_PERIPH_CLK, which is set to PLL1 in normal
+	 * operation, same as the M4 and M0 cores. Memory, of course, is
+	 * running from the same clock as the cores.
+	 */
+	LPC_GPDMA->SYNC |= (1 << gpdma_src_peripheral);
+	LPC_GPDMA->SYNC |= (1 << gpdma_dest_peripheral);
+#endif
 }
 
 void configure(