From ff9c911a9388047784a782e19d1963ed2271d766 Mon Sep 17 00:00:00 2001 From: Jared Boone Date: Tue, 19 Jul 2016 11:02:30 -0700 Subject: [PATCH] Optional code to disable baseband DMA synchronization. --- firmware/baseband/baseband_dma.cpp | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/firmware/baseband/baseband_dma.cpp b/firmware/baseband/baseband_dma.cpp index f5dcca1e..d86bef72 100644 --- a/firmware/baseband/baseband_dma.cpp +++ b/firmware/baseband/baseband_dma.cpp @@ -115,9 +115,16 @@ static void dma_error() { void init() { gpdma_channel_sgpio.set_handlers(transfer_complete, dma_error); - - // LPC_GPDMA->SYNC |= (1 << gpdma_src_peripheral); - // LPC_GPDMA->SYNC |= (1 << gpdma_dest_peripheral); +#if defined(PORTAPACK_BASEBAND_DMA_NO_SYNC) + /* Disable synchronization logic to improve(?) DMA response time. + * SGPIO (peripheral) must be on same clock as GPDMA peripheral. + * SGPIO runs from BASE_PERIPH_CLK, which is set to PLL1 in normal + * operation, same as the M4 and M0 cores. Memory, of course, is + * running from the same clock as the cores. + */ + LPC_GPDMA->SYNC |= (1 << gpdma_src_peripheral); + LPC_GPDMA->SYNC |= (1 << gpdma_dest_peripheral); +#endif } void configure(