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Optional code to disable baseband DMA synchronization.

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This commit is contained in:
Jared Boone 2016-07-19 11:02:30 -07:00
parent 2993f7be1d
commit ff9c911a93
1 changed files with 10 additions and 3 deletions
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13
firmware/baseband/baseband_dma.cpp
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@ -115,9 +115,16 @@ static void dma_error() {
void init() {
gpdma_channel_sgpio.set_handlers(transfer_complete, dma_error);
// LPC_GPDMA->SYNC |= (1 << gpdma_src_peripheral);
// LPC_GPDMA->SYNC |= (1 << gpdma_dest_peripheral);
#if defined(PORTAPACK_BASEBAND_DMA_NO_SYNC)
/* Disable synchronization logic to improve(?) DMA response time.
* SGPIO (peripheral) must be on same clock as GPDMA peripheral.
* SGPIO runs from BASE_PERIPH_CLK, which is set to PLL1 in normal
* operation, same as the M4 and M0 cores. Memory, of course, is
* running from the same clock as the cores.
*/
LPC_GPDMA->SYNC |= (1 << gpdma_src_peripheral);
LPC_GPDMA->SYNC |= (1 << gpdma_dest_peripheral);
#endif
}
void configure(