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ddd969870e
tillitis-key/hw/application_fpga/core/timer/rtl
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Joachim Strömbergson ddd969870e
Count from init values to one, not zero
2022-10-18 11:06:40 +02:00
..
timer_core.v Count from init values to one, not zero 2022-10-18 11:06:40 +02:00
timer.v Change ADDR_CTRL to be a pulsed start_stop signal 2022-10-14 08:50:30 +02:00