tillitis-key/hw/application_fpga/core
Joachim Strömbergson cadf8e9849
FPGA: Add sim model of udi_rom
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2024-06-07 12:06:40 +02:00
..
picorv32 Squashed commit of the following: 2022-10-06 13:23:30 +02:00
timer Update Verilog version to 2005 for linting 2024-04-24 08:44:08 +02:00
tk1 FPGA: Add sim model of udi_rom 2024-06-07 12:06:40 +02:00
touch_sense Update Verilog version to 2005 for linting 2024-04-24 08:44:08 +02:00
trng Update Verilog version to 2005 for linting 2024-04-24 08:44:08 +02:00
uart Update Verilog version to 2005 for linting 2024-04-24 08:44:08 +02:00
uds Update Verilog version to 2005 for linting 2024-04-24 08:44:08 +02:00