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tillitis-key/hw/application_fpga/core/rom
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Jonas Thörnblad 3514d7ef3c
FPGA: Format verilog code
2024-10-22 12:04:19 +02:00
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rtl FPGA: Format verilog code 2024-10-22 12:04:19 +02:00
README.md Doc: Add README for the ROM core. 2024-08-29 16:06:59 +02:00

README.md

rom

ROM for the firmware (FW).

Introduction

This core implements the ROM where the FW is stored.

API

The core does not have an API.

Implementation Details

The core is implemented by implicitly allocating a number of Embedded Block Memory (EBM) cores, also known as SB_RAM40_4K.

During building of the FPGA bitstream the ROM binary image is mapped into the ROM address space. When the FPGA is configured by the bitstream, the SB_RAM40_4K cores are loaded with the ROM. The contents is not changed by a system reset.