mirror of
https://github.com/tillitis/tillitis-key1.git
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469 lines
16 KiB
Markdown
469 lines
16 KiB
Markdown
# Release Notes
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Descriptions of the tagged TKey releases.
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## Upcoming release: Castor
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Overview of changes since [TK1-24.03
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Bellatrix](https://github.com/tillitis/tillitis-key1/releases/tag/TK1-24.03)
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for the Castor milestone so far.
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Main branch in the repository contains Castor design and specifically
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the tag `TK1-Castor-alpha-1` reflects the upcoming release.
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**Note well**: BREAKING CHANGE! Older device apps WILL NOT WORK.
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The introduction of the USB Mode Protocol between the programs running
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on the PicoRV32 CPU and the CH552 means that device apps that have not
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been changed to use the protocol will not have any way to communicate
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with the outside world.
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### How to test TK1-Castor-alpha
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To test this alpha release you will need:
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- Tkey Unlocked
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- TKey Programmer Board
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- CH55x Reset Controller from [Blinkinlabs](https://shop-nl.blinkinlabs.com/products/ch55x-reset-controller)
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Read
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[here](https://github.com/tillitis/tillitis-key1/blob/main/README.md#building--flashing)
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for instructions.
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### General
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- Split repo:
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- tk1, mta1-usb-dev, mta-usb-v1 and mta1-library moves to
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<https://github.com/tillitis/tk1-pcba>
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- tp1, mta1-usb-programmer, mta1-library and KiCad-RP Pico moves to
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<https://github.com/tillitis/tp1>
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For full change log [see](https://github.com/tillitis/tillitis-key1/compare/TK1-23.03.2...coming-tag)
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### FPGA
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- Make Security Monitor memory access checks more complete.
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- Add SPI main controller mainly to access the flash chip.
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- Add system reset API. Device apps can reset the FPGA and restart
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the firmware.
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- Increase clock frequence to 24 MHz.
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- Increase UART baudrate to 500,000.
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- Fix UART baudrate counter issues noticable at higher baudrates.
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- Fix missing clock cycles in timer core.
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- Remove the UART runtime configuration API.
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- Several minor clean ups of design and testbench.
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- Add hardware clear to send (CTS) signals for communication between
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UART and CH552.
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- Increase size of ROM and FW\_RAM.
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- Make ROM non-executable in app mode.
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- Remove MMIO address for access to the firmware blake2s() function
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from apps.
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- Automatically leave firmware mode when execution leaves ROM and
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remove the now unnecessary APP\_MODE\_CTRL register.
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- Change UDS read protection: When execution leaves ROM the first
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time, UDS is hardware protected from reads. The already existing
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protection that UDS is protected after the first read is also still
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available.
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- Introduce interrupt handler for hardware-based privilege raising and
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automatically privelege lowering for system calls.
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### Firmware
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- At startup, fill RAM with random data using the xorwow PRNG, seeded
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by TRNG.
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- Add support for the new USB Mode Protocol to communicate with
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different USB endpoints in the USB controller.
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- Support a filesystem on flash: There's space for two pre-loaded
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apps and four storage areas for device apps.
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A typical use is that app slot 0 will contain a loader app for
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verified boot and app slot 1 contains the app to be verified.
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- Automatically start an app in flash app slot 0 after power cycle and
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when instructed to by reset intentions.
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The automatically started app is trusted by the firmware by
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including an app digest in the firmware ROM. This means we extend
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the user's trust in the firmware to the first app, but only if it's
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measured to the correct digest by the firmware. Anything else is a
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hard error which halts the CPU.
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- Support chaining of apps through soft resets, including support for
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verifying that the next app is the expected one (exact measured
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digest the previous app expected), and leaving data for the next app
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to use.
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- Add a system call mechanism and system calls. See [firmware's
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README](../hw/application_fpga/fw/README.md) for documentation, but
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its probably easier to use the the syscall wrappers in libsyscall in
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[tkey-libs](https://github.com/tillitis/tkey-libs) if you're writing
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in C.
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- Harmonize with [tkey-libs](https://github.com/tillitis/tkey-libs).
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Import tkey-libs to this repo for convenience.
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- Rewrite test firmware to work with the new leaving ROM-scenario.
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Introduce a separate `testapp` for the app mode parts.
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### Device apps
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Introduce some device apps mostly for testing.
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- `reset_test`: Test the different types of soft reset.
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- `testapp`: Tests in app mode that used to live in `testfw`.
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- `testloadapp`: A simple loader app for management and verification
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of a second app.
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- `defaultapp`: An app that immediately resets the TKey to load an app
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from the client, just like earlier releases.
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### CH552 firmware
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- Use the new CTS signals for communication over the UART.
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- Add support for two HID endpoints (security token and our debug
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HID).
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- Add support for CCID endpoint.
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- Add a protocol to communicate with the different endpoints: CDC,
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CCID, FIDO, debug.
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- Change USB frame sending from a software timer to instead be
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controlled by the USB Controller Protocol.
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Note that to update the CH552 firmware you will need something like
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the Blinkinlabs CH55x Reset Controller:
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<https://shop-nl.blinkinlabs.com/products/ch55x-reset-controller>
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<https://github.com/Blinkinlabs/ch55x_programmer>
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### Tooling
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- Add tools to parse and generate partition tables and flash images.
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- Add tool to compute a print a BLAKE2s digest, optionally as C code.
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### tkey-builder
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- New versions of:
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- clang (18.1.3, part of ubuntu 24.04)
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- icestorm (commit 738af822905fdcf0466e9dd784b9ae4b0b34987f
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)
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- yosys (0.45)
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- nextpnr (0.7) + extra patches for RNG seed handling and early exit
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- iverilog (v12)
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- verilator (v5.028)
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- verible (v0.0-3795)
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- cocotb (v1.9.1)
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- Remove TKey Programmer (TP) toolchain:
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- gcc-arm-none-eabi: Used for the TKey Programmer firmware, now
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moved to it's own repo.
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- libnewlib-arm-none-eabi
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- libstdc++-arm-none-eabi-newlib
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- pico-sdk
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TP1 is now in <https://github.com/tillitis/tp1>
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- Remove Go compiler support.
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- Introduce buildtools.sh for building upstream tools for inclusion
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in the image.
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### Docs
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- All docs now in READMEs close to the design or code.
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- Protocol docs moved to [the Developer
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Handbook](https://dev.tillitis.se/)
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[repo](https://github.com/tillitis/dev-tillitis)
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## TK1-24.03
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This is an official release of the "Bellatrix" version of the Tillitis'
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TKey. This version is ready for general use.
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Using OCI image `ghcr.io/tillitis/tkey-builder:4`, built from
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`../contrib/Dockerfile`, and the generic
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`../hw/application_fpga/data/uds.hex` and
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`../hw/application_fpga/data/udi.hex`, a clean build should generate
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the following digest:
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```
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321924aa3b26507f2a02325750e63c83b306c7831f8e2c87e8d198cecf8cc1c1 application_fpga.bin
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```
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### FPGA
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- Security Monitor now prevents access to RAM outside of the physical
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memory. If it detects an access outside of the RAM address space, it
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will halt the CPU.
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- CPU Monitor changes name to Security monitor, which CPU Monitor is a
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part of. Prepare for more functions in the future.
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- Support incremental builds for the bitstream, when changing UDS/UDI
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between builds. Requires tkey-builder:3 or higher.
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- Update Verilog linter to Verilog-2005 and fixed warnings.
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- Complete testbenches and add 9 tests for the FPGA cores.
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### Firmware
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- Protect zeroisation against compiler optimisation by using
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secure_wipe(), fixing a memset() that was removed during
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compilation.
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- Make memeq() function side channel silent.
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- Change memory constants to defines instead of an enum, to be
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compatible with ISO C.
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- Deprecate TK1_MMIO_TK1_RAM_ASLR and introduce
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TK1_MMIO_TK1_RAM_ADDR_RAND instead to distinguish from OS-level
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ASLR.
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- Use pedantic warnings while building firmware and fixed warnings.
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- Use clang-tidy in CI.
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- Fix warnings from splint.
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### TP1
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- New plastic clip o and update of BOM.
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- Build TP1 firmware in CI.
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### CH552
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- Fixed a bug where a byte of data could in some rare circumstances be
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dropped, causing a client app to hang.
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- General clean-up of code, translated all comments to English.
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### TK1
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- New injection moulded plastic case
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### tkey-builder
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- Updated to version 3. Bumping Ubuntu to 23.10, Yosys to 0.36 and
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nextpnr to 0.6.
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- Updated to version 4. Bumping pico-sdk to 1.5.1, adding clang-tidy
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and splint.
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### Docs
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- Fixing broken links, cleaning up docs and READMEs.
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- Clarify warm boot attack mitigations and scope for Bellatrix in
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threat model.
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For full change log [see](https://github.com/tillitis/tillitis-key1/compare/TK1-23.03.2...TK1-24.03)
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## TK1-23.03.2
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This is the official release of the "Bellatrix" version of the
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Tillitis TKey device. This version is ready for general use.
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This release only contains a hardware update to tk1. Capacitor C8 is
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not populated. A PCB spring contact, U11, is insted placed on the
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footprint of C8.
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## TK1-23.03.1
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This is the official release of the "Bellatrix" version of
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the Tillitis TKey device. This version is ready for general
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use.
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Given the OCI image `ghcr.io/tillitis/tkey-builder:2` built from
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`../contrib/Dockerfile` and the generic UDS.hex and UDI.hex, a clean
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build should generate the following digest:
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```
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sha256sum application_fpga.bin
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d2970828269b3ba7f09fb73b8592b08814dfe8c8087b00b0659feb516bb00f33 application_fpga.bin
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```
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This bug fix release contains the following changes:
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- Change the firmware protocol max frame size back to 128 bytes
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- Correct a bug with the reading out of UDS
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## TK1-23.03
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This is the official release of the "Bellatrix" version of
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the Tillitis TKey device. This version is ready for general
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use.
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Given the OCI image `ghcr.io/tillitis/tkey-builder:1` built from
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`contrib/Dockerfile` and the generic UDS.hex and UDI.hex, a clean
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build should generate the following digest:
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```
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shasum -a256 application_fpga.bin
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f11d6b0f57c5405598206dcfea284008413391a2c51f124a2e2ae8600cb78f0b application_fpga.bin
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```
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### New and improved functionality
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- (ALL) The TKey HW design, FW, protocol and first applications has
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been audited by a third party. No major issues was found, but the
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audit has lead to several updates, changes and fixes to improve
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the security and robustness. The third party report will be
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published when completed.
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- (APPS) Applications can now use the whole 128 kByte RAM.
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- (FW) The firmware now use the `FW_RAM` for the stack. It keeps no
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.bss or .data segments and only uses RAM for loading the
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application.
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- (FW) The firmware has been hardened and the state machine simplified
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to reduce the number of commands that can be used and in which
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order. It exits early on failure to a fail state indicated by the
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RGB LED blinking red on error in an eternal loop.
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- (FW) Steady white LED while waiting for initial commands. LED off
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while loading app.
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- (HW) The memory system now has an execution monitor. The monitor
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detects attempts at reading instructions from the firmware ram.
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The execution monitor can also, when enabled by an application,
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detect attempts at reading instructions from the application
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stack. If any such attempt is detected, the memory system will
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force the CPU to read an illegal instruction, triggering the
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trap state in the CPU.
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Note that the execution monitor can only be enabled, not
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disabled. The address range registers defining the region
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protected by the monitor can only be set when the monitor
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has not yet been enabled.
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- (HW) The CPU trap signal is now connected to an illegal instruction
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trap indicator. When an illegal instruction is detected, the RGB LED
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will start flashing red. Note that the CPU will stay in the trap
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state until the TKey device is disconnected.
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- (HW) The RAM memory now includes an address randomisation and data
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scrambling mechanism to make it harder for someone outside of the
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CPU to find assets generated by and stored in the RAM by
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applications. This randomisation and scrambling is set up by
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firmware before the application is loaded, and does not affect how
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applications executes.
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- (HW) The UART Rx FIFO now allows applications to read out the
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number of bytes received and not yet consumed by the application.
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- (HW) The FPGA bitstream can now be stored in the non volatile
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configuration memory (NVCM). This is done using of a new icestorm
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tool developed partly in the project and sponsored by Tillitis
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and Mullvad. The tool supports locking down NVCM access after
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writing the FPGA bitstream to the memory.
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- (TOOLS) There is now an OCI image
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(`ghcr.io/tillitis/tkey-builder:1`) and Dockerfile setting up all
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tools as needed to build the bitstream.
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- (TOOLS) There is now a version of iceprog able to write to the FPGA
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bitstream to the NVCM and lock the NVCM from external access
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### Bugs fixed
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- No known bugs have been fixed. Numerous issues has been closed.
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### Limitations
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- The RAM address and data scrambling in this release is not
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cryptographically secure. It his however randomized every time
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a TKey device is powered up.
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## engineering-release-2
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### New and improved functionality
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- (HW) The rosc TRNG has now been completed and tested. The TRNG
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can now be used to generate seeds by applicaitons.
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- (HW) The main clock frequency has been increased to 18 MHz.
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- (HW) The FW now has a separate RAM used during loading and
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measurement of applications.
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- (HW) The UART Rx FIFO is now able to handle 512 bytes.
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- (HW) The UART default bitrate has been increased to 62500 bps.
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- (HW) Support for division instruction (div) was removed from
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PicoRV32. Please compile your programs with the Zmmul extension,
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`-march=rv32iczmmul` for `clang`.
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- (HW) The UDI is locked down and can only be accessed by firmware, to
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prevent applications from tracking a particular TKey.
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- (HW) The timer MMIO API now takes separate start and stop bits for
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triggering the respective action, mitigating a time-of-check to
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time-of-use (TOCTOU) issue.
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- (FW) The firmware has been restructured to be a Finite State
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Machine (FSM) with defined states for booting, loading
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applications, measure applications, calculate the CDI and
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start the loaded application.
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This change also changes the firmware protocol which now accepts a
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request to load a binary with an optional USS and automatically
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returns its digest and start the program when the last data chunk is
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received.
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- (FW) A BLAKE2s hash function present in firmware is now exposed for use
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by TKey apps (through a function pointer located in MMIO `BLAKE2S`).
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See [software.md](system_description/software.md) for more
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information.
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- (FW) To make warm boot attacks harder, the firmware sleeps for a
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random number of cycles before reading out the sensitive UDS into
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FW RAM.
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## engineering-release-1
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### Hardware
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#### Limitations
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- The entropy generated by the TRNG has not yet been thoroughly tested,
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and the generator has not been adjusted to generate good, unbiased
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randomness. Any application that wants to use the entropy source
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SHOULD NOT use the output directly, but only as seed to a Digital
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Random Bit Generator (DRBG), such as Hash_DRBG.
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- The UART is currently running at 38400 bps. Future releases will
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increase the bitrate when communication at higher bitrates has
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been verified as stable and error free.
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- The internal clock frequency is currently limited to 12 MHz.
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Future releases will increase the clock frequency to provide
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improved performance.
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- The functionality in the firmware is currently not exposed to the
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applications via a stable name space, API. Future releases will
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provide access to FW functions such as the BLAKE2s hash function.
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- The timer currently does not include a timeout interrupt. Applications
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using the timer must check the status in order to detect a timeout event.
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- The timer currently does not provide a set of typical settings.
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Applications using the timer must set timer and prescaler as
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needed to get the desired time given the current clock speed.
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