Joachim Strömbergson b5ba21148d

FPGA: Cleanup tk1 spi testbench ...

- Remove DUT variables from state display that was removed as part of
  performance fix
- Corrected some incorrect display statements for expected unique ID and
  byte counters

Co-authored-by: Daniel Jobson <jobson@tillitis.se>
Signed-off-by: Joachim Strömbergson <joachim@assured.se>

2024-07-11 09:39:31 +02:00

..

core

FPGA: Cleanup tk1 spi testbench

2024-07-11 09:39:31 +02:00

data

A construction of a minimal SPI master.

2024-06-11 15:28:29 +02:00

fw

FPGA: Update names for RAM randomization API

2024-07-10 13:45:26 +02:00

rtl

FPGA: Update names for RAM randomization API

2024-07-10 13:45:26 +02:00

tb

Rename to TK1

2022-10-26 09:20:02 +02:00

tools

hw/tool: UDI/UDS storage

2024-04-03 11:27:00 +02:00

application_fpga.bin.sha256

FPGA: Update names for RAM randomization API

2024-07-10 13:45:26 +02:00

config.vlt

Config verilator lint to ignore known 3rd-party warnings; let warnings be fatal

2023-03-01 13:37:31 +01:00

firmware.bin.sha512

FPGA: Update names for RAM randomization API

2024-07-10 13:45:26 +02:00

Makefile

CI: Enable linting in CI again. See #182.

2024-06-17 15:37:13 +02:00