dehanj 8ca4241ade Disable non-zero exit for verilog linter in CI, see issue 182.		2024-03-20 16:39:53 +01:00
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application_fpga	Disable non-zero exit for verilog linter in CI, see issue 182.	2024-03-20 16:39:53 +01:00
boards	Add injection molded plastic case	2023-12-11 13:48:39 +01:00
production_test	Print warning if the programmer device permissions are incorrect	2023-03-21 14:38:29 +01:00