tillitis-key/hw/application_fpga/rtl
Joachim Strömbergson 6e6c2ab3ca
Add blake2s core
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2023-09-08 14:52:40 +02:00
..
application_fpga.v Add blake2s core 2023-09-08 14:52:40 +02:00
clk_reset_gen.v Explain how we attain 18 MHz 2022-10-21 14:33:03 +02:00
fw_ram.v bank1 access should also be disabled by default. 2023-03-13 12:43:07 +01:00
ram.v Make initial public release 2022-09-19 08:51:11 +02:00
rom.v Move force_jump function to top level mem system 2023-03-06 15:41:54 +01:00