Joachim Strömbergson 6d9fc7db11 FPGA: Add core local Makefile for linting the PicoRV32 ... - Add more flags to catch the issues seen when linting the FPGA. - Store issues in separate file for viewing. Remove with make clean. Signed-off-by: Joachim Strömbergson <joachim@assured.se>		2024-06-17 15:27:47 +02:00
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picorv32	FPGA: Add core local Makefile for linting the PicoRV32	2024-06-17 15:27:47 +02:00
timer	Update Verilog version to 2005 for linting	2024-04-24 08:44:08 +02:00
tk1	Adding testbench and simulation targets for the SPI master.	2024-06-11 15:28:29 +02:00
touch_sense	Update Verilog version to 2005 for linting	2024-04-24 08:44:08 +02:00
trng	Update Verilog version to 2005 for linting	2024-04-24 08:44:08 +02:00
uart	Update Verilog version to 2005 for linting	2024-04-24 08:44:08 +02:00
uds	Update Verilog version to 2005 for linting	2024-04-24 08:44:08 +02:00