Joachim Strömbergson 6d9fc7db11 FPGA: Add core local Makefile for linting the PicoRV32 ... - Add more flags to catch the issues seen when linting the FPGA. - Store issues in separate file for viewing. Remove with make clean. Signed-off-by: Joachim Strömbergson <joachim@assured.se>		2024-06-17 15:27:47 +02:00
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core	FPGA: Add core local Makefile for linting the PicoRV32	2024-06-17 15:27:47 +02:00
data	A construction of a minimal SPI master.	2024-06-11 15:28:29 +02:00
fw	Remove redundant RAM address and data scrambling	2024-06-13 12:54:47 +02:00
rtl	A construction of a minimal SPI master.	2024-06-11 15:28:29 +02:00
tb	Rename to TK1	2022-10-26 09:20:02 +02:00
tools	hw/tool: UDI/UDS storage	2024-04-03 11:27:00 +02:00
application_fpga.bin.sha256	Remove redundant RAM address and data scrambling	2024-06-13 12:54:47 +02:00
config.vlt	Config verilator lint to ignore known 3rd-party warnings; let warnings be fatal	2023-03-01 13:37:31 +01:00
firmware.bin.sha512	Remove redundant RAM address and data scrambling	2024-06-13 12:54:47 +02:00
Makefile	A construction of a minimal SPI master.	2024-06-11 15:28:29 +02:00