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tillitis-key/hw/application_fpga
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Joachim Strömbergson 3fb6d66cf3
Add set-only register for the force_trap signal to ensure 
that the device must be reset to get out of trap. This
change also breaks a critical path.

Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2024-03-20 14:36:55 +01:00
..
core
Add set-only register for the force_trap signal to ensure
2024-03-20 14:36:55 +01:00
data
Change name of pin constraint file to match tk1 pcb
2023-07-04 09:04:29 +02:00
fw
fw: Change ASLR name in MMIO
2024-03-19 14:36:31 +01:00
rtl
Only set ram_we to cpu_wstrb in RAM_PREFIX
2024-03-20 14:36:55 +01:00
tb
Rename to TK1
2022-10-26 09:20:02 +02:00
tools
Correct to new path
2023-01-13 15:42:46 +01:00
application_fpga.bin.sha256
FW: Force the CPU to hang on errors
2024-03-14 15:48:10 +01:00
config.vlt
Config verilator lint to ignore known 3rd-party warnings; let warnings be fatal
2023-03-01 13:37:31 +01:00
firmware.bin.sha512
FW: Force the CPU to hang on errors
2024-03-14 15:48:10 +01:00
Makefile
Add testbench targets on top-level
2024-03-20 13:47:12 +01:00