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tillitis-key/hw/application_fpga/core
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Mikael Ågren 3269d25617
PoC: tb: Write data only once per call to write_word() in tb_tk1 
Keep WE and CS high for one clock cycle instead of two. To avoid writing
the same address twice.
2025-02-07 12:54:04 +01:00
..
clk_reset_gen
FPGA: Format verilog code
2024-10-22 12:04:19 +02:00
fw_ram
PoC: Control access to FW RAM
2025-02-07 12:54:01 +01:00
picorv32
FPGA: Ignore warnings about blocking assignment in clocked processes
2024-06-17 15:37:13 +02:00
ram
Doc: move implementation details of RAM scrambling to RAM core
2024-11-20 15:48:49 +01:00
rom
Fix typo
2024-11-14 16:35:50 +01:00
timer
tb: make timer core testbench selftesting
2024-11-27 08:10:15 +01:00
tk1
PoC: tb: Write data only once per call to write_word() in tb_tk1
2025-02-07 12:54:04 +01:00
touch_sense
tb: Make touch_sense selftesting
2024-12-09 13:55:42 +01:00
trng
tb: Make trng selftesting
2024-12-09 13:55:43 +01:00
uart
tb: Make uart selftesting
2024-12-09 13:55:43 +01:00
uds
PoC: Make sensitive assets only readable/writable before system_mode is set
2025-02-07 12:54:02 +01:00