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tillitis-key/hw/application_fpga/core/timer
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Joachim Strömbergson 9d188a2f7f
Add more info about how the timer works 
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2023-07-04 09:04:24 +02:00
..
rtl Add separate start, stop bits and running status bit in API 2023-01-30 15:48:57 +01:00
tb Add testcase for the timer top level wrapper and clean up the tb 2023-07-04 09:04:24 +02:00
toolruns Minor cleanup of README, testbench and Makefile 2023-07-04 09:04:24 +02:00
README.md Add more info about how the timer works 2023-07-04 09:04:24 +02:00

README.md

timer

A simple timer with prescaler.

Introduction

This core implements a simple timer with a prescaler. The prescaler allows measurement of time durations rather than cycles. If for example setting the prescaler to the clock frequency in Hertz, the timer will count seconds.

Details

The timer counter and the prescaler counter are both 32 bits. When enabled the counter counts down one integer value per cycle.

The timer will stop when reaching final zero (given by prescaler times the initial value of the timer) and the running flag will be lowered.