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fpga: Add extra access control on UDS

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Restrict access to UDS when we have exited firmware the first time.

Co-authored-by: Michael Cardell Widerkrantz <mc@tillitis.se>
This commit is contained in:
Mikael Ågren 2025-02-24 09:49:30 +01:00
parent 77fc5cf578
commit 7554787678
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GPG key ID: E02DA3D397792C46
4 changed files with 19 additions and 14 deletions
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4
hw/application_fpga/rtl/application_fpga.v
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@ -154,6 +154,7 @@ module application_fpga (
wire [31 : 0] tk1_read_data;
wire tk1_ready;
wire app_mode;
wire fw_startup_done;
wire force_trap;
wire [14 : 0] ram_addr_rand;
wire [31 : 0] ram_data_rand;
@ -294,7 +295,7 @@ module application_fpga (
.clk(clk),
.reset_n(reset_n),
.app_mode(app_mode),
.en(~fw_startup_done),
.cs(uds_cs),
.address(uds_address),
@ -341,6 +342,7 @@ module application_fpga (
.reset_n(reset_n),
.app_mode(app_mode),
.fw_startup_done(fw_startup_done),
.cpu_addr (cpu_addr),
.cpu_instr (cpu_instr),