Git-Mirrors/tillitis-key
1
0
Fork 0
mirror of https://github.com/tillitis/tillitis-key1.git synced 2025-08-18 19:27:59 -04:00
Code Issues Projects Releases Packages Wiki Activity

fpga/testfw: Update clock frequency to 24 MHz

Browse source 
Reconfigure the baudrate to keep 500 kbaud.

Correct a forgotten test in testfw that wasn't updated the last time
frequency was raised in commit
75b028505f in June 17, 2024.
This commit is contained in:
Jonas Thörnblad 2025-01-09 15:15:16 +01:00 • committed by Michael Cardell Widerkrantz
parent 50aacb4a5c
commit 68f5c9af26
No known key found for this signature in database
GPG key ID: D3DB3DDF57E704E5
4 changed files with 10 additions and 9 deletions
Download patch file Download diff file Expand all files Collapse all files

6
hw/application_fpga/core/uart/rtl/uart.v
View file

@ -82,10 +82,10 @@ module uart (
// The default bit rate is based on target clock frequency
// divided by the bit rate times in order to hit the
// center of the bits. I.e.
// Clock: 21 MHz, 500 kbps
// Divisor = 21E6 / 500E3 = 42
// Clock: 24 MHz, 500 kbps
// Divisor = 24E6 / 500E3 = 48
// This also satisfies 1E6 % bps == 0 for the CH552 MCU used for USB-serial
localparam DEFAULT_BIT_RATE = 16'd42;
localparam DEFAULT_BIT_RATE = 16'd48;
localparam DEFAULT_DATA_BITS = 4'h8;
localparam DEFAULT_STOP_BITS = 2'h1;