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Refer to named bits consistently; say 0/1 instead of unset/set

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Clarify touch
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Daniel Lublin 2022-10-26 08:34:12 +02:00
parent e53811ca91
commit 5e80b4ae15
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1 changed files with 7 additions and 6 deletions
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doc/system_description/software.md
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@ -327,13 +327,13 @@ Assigned core prefixes:
| *name* | *fw* | *app | *size* | *type* | *content* | *description* |
|-------------------|-------|------------|--------|----------|-----------|-----------------------------------------------------------------------|
| `TRNG_STATUS` | r | r | | | | STATUS_READY_BIT is set when an entropy word is available. |
| `TRNG_STATUS` | r | r | | | | TRNG_STATUS_READY_BIT is 1 when an entropy word is available. |
| `TRNG_ENTROPY` | r | r | 4B | u32 | | Entropy word. Reading a word will clear status. |
| `TIMER_CTRL` | r/w | r/w | | | | If bit 0 in TIMER_STATUS is set then writing here starts the timer. |
| | | | | | | If bit 0 in TIMER_STATUS is unset then writing here stops the timer. |
| `TIMER_STATUS` | r | r | | | | If bit 0 is set, the timer is ready to start running. |
| `TIMER_CTRL` | r/w | r/w | | | | If TIMER_STATUS_READY_BIT in TIMER_STATUS is 1 then writing here |
| | | | | | | starts the timer. If the same bit is 0 then writing stops the timer. |
| `TIMER_STATUS` | r | r | | | | TIMER_STATUS_READY_BIT is 1 when timer is ready to start running. |
| `TIMER_PRESCALER` | r/w | r/w | 4B | | | Prescaler init value. Write blocked when running. |
| `TIMER_TIMER` | r/w | r/w | 4B | | | Timer init or current value when running. Write blocked when running. |
| `TIMER_TIMER` | r/w | r/w | 4B | | | Timer init or current value while running. Write blocked when running.|
| `UDS_FIRST` | r[^3] | invisible | 4B | u8[32] | | First word of Unique Device Secret key. |
| `UDS_LAST` | | invisible | | | | The last word of the UDS |
| `UART_BITRATE` | r/w | | | | | TBD |
@ -343,7 +343,8 @@ Assigned core prefixes:
| `UART_RX_DATA` | r | r | 1B | u8 | | Data to read. Only LSB contains data |
| `UART_TX_STATUS` | r | r | 1B | u8 | | Non-zero when it's OK to write data |
| `UART_TX_DATA` | w | w | 1B | u8 | | Data to send. Only LSB contains data |
| `TOUCH_STATUS` | r/w | r/w | | | | STATUS_EVENT_BIT is set when touched; write to it after |
| `TOUCH_STATUS` | r/w | r/w | | | | TOUCH_STATUS_EVENT_BIT is 1 when touched. After detecting a touch |
| | | | | | | event (reading a 1), write anything here to acknowledge it. |
| `FW_RAM` | r/w | invisible | 1 kiB | u8[1024] | | Firmware-only RAM. |
| `UDA` | r | invisible | 16B | u8[16] | | Unique Device Authentication key. |
| `UDI` | r | r | 8B | u64 | | Unique Device ID (UDI). |