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Remove name, version from several cores

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timer
       touch_sense
       figaro
       uart
       uds
This commit is contained in:
Joachim Strömbergson 2022-10-11 09:50:45 +02:00
parent c90771fe19
commit 3f44b999ac
No known key found for this signature in database
GPG key ID: 865B8A548EA61679
6 changed files with 13 additions and 117 deletions
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20
hw/application_fpga/core/uds/rtl/uds.v
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@ -29,17 +29,9 @@ module uds(
//----------------------------------------------------------------
// Internal constant and parameter definitions.
//----------------------------------------------------------------
localparam ADDR_NAME0 = 8'h00;
localparam ADDR_NAME1 = 8'h01;
localparam ADDR_VERSION = 8'h02;
localparam ADDR_UDS_FIRST = 8'h10;
localparam ADDR_UDS_LAST = 8'h17;
localparam CORE_NAME0 = 32'h7564735f; // "uds_"
localparam CORE_NAME1 = 32'h6d656d20; // "mem "
localparam CORE_VERSION = 32'h00000001;
//----------------------------------------------------------------
// Registers including update variables and write enable.
@ -99,18 +91,6 @@ module uds(
if (cs) begin
tmp_ready = 1'h1;
if (address == ADDR_NAME0) begin
tmp_read_data = CORE_NAME0;
end
if (address == ADDR_NAME1) begin
tmp_read_data = CORE_NAME1;
end
if (address == ADDR_VERSION) begin
tmp_read_data = CORE_VERSION;
end
if ((address >= ADDR_UDS_FIRST) && (address <= ADDR_UDS_LAST)) begin
if (!fw_app_mode) begin
if (uds_rd_reg[address[2 : 0]] == 1'h0) begin

28
hw/application_fpga/core/uds/tb/tb_uds.v
View file

@ -42,6 +42,7 @@ module tb_uds();
reg tb_clk;
reg tb_reset_n;
reg tb_fw_app_mode;
reg tb_cs;
reg [7 : 0] tb_address;
wire [31 : 0] tb_read_data;
@ -53,14 +54,15 @@ module tb_uds();
// Device Under Test.
//----------------------------------------------------------------
uds dut(
.clk(tb_clk),
.reset_n(tb_reset_n),
.clk(tb_clk),
.reset_n(tb_reset_n),
.cs(tb_cs),
.fw_app_mode(tb_fw_app_mode),
.address(tb_address),
.read_data(tb_read_data)
);
.cs(tb_cs),
.address(tb_address),
.read_data(tb_read_data)
);
//----------------------------------------------------------------
@ -161,10 +163,11 @@ module tb_uds();
tc_ctr = 0;
tb_monitor = 0;
tb_clk = 1'h0;
tb_reset_n = 1'h1;
tb_cs = 1'h0;
tb_address = 8'h0;
tb_clk = 1'h0;
tb_reset_n = 1'h1;
tb_fw_app_mode = 1'h0;
tb_cs = 1'h0;
tb_address = 8'h0;
end
endtask // init_sim
@ -204,11 +207,6 @@ module tb_uds();
$display("");
$display("--- test1: started.");
$display("--- test1: Reading NAME and version info.");
read_word(ADDR_NAME0);
read_word(ADDR_NAME1);
read_word(ADDR_VERSION);
$display("--- test1: Dumping DUT state to show UDS contents");
dump_dut_state();