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https://github.com/tillitis/tillitis-key1.git
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testfw: Use special linker script for test firmware
Since we test the FW_RAM we can't keep anything there, not the stack (already fixed by different start.S), nor the .bss, which we fix now with a different linker script that uses app-RAM for .bss.
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2 changed files with 71 additions and 1 deletions
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@ -177,6 +177,7 @@ secret:
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# Included in the bitstream.
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#-------------------------------------------------------------------
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LDFLAGS = -T $(P)/fw/tk1/firmware.lds
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TESTFWLDFLAGS = -T $(P)/fw/testfw/testfw.lds
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$(FIRMWARE_OBJS): $(FIRMWARE_DEPS)
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$(TESTFW_OBJS): $(FIRMWARE_DEPS)
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@ -220,7 +221,7 @@ splint:
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$(FIRMWARE_SOURCES)
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testfw.elf: $(TESTFW_OBJS) $(P)/fw/tk1/firmware.lds
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$(CC) $(CFLAGS) $(TESTFW_OBJS) $(LDFLAGS) -o $@
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$(CC) $(CFLAGS) $(TESTFW_OBJS) $(TESTFWLDFLAGS) -o $@
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# Generate a fake BRAM file that will be filled in later after place-n-route
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bram_fw.hex:
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69
hw/application_fpga/fw/testfw/testfw.lds
Normal file
69
hw/application_fpga/fw/testfw/testfw.lds
Normal file
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@ -0,0 +1,69 @@
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/*
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* Copyright (C) 2022, 2023 - Tillitis AB
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* SPDX-License-Identifier: GPL-2.0-only
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*/
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OUTPUT_ARCH( "riscv" )
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ENTRY(_start)
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MEMORY
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{
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ROM (rx) : ORIGIN = 0x00000000, LENGTH = 0x20000 /* Pretend we have 128 kiB */
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RAM (rwx) : ORIGIN = 0x40000000, LENGTH = 0x20000 /* 128 KB */
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}
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SECTIONS
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{
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.text.init :
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{
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*(.text.init)
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} >ROM
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.htif :
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{
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. = ALIGN(0x00000000);
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*(.htif)
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} >ROM
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.text :
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{
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. = ALIGN(4);
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*(.text) /* .text sections (code) */
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*(.text*) /* .text* sections (code) */
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*(.rodata) /* .rodata sections (constants, strings, etc.) */
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*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
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*(.srodata) /* .rodata sections (constants, strings, etc.) */
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*(.srodata*) /* .rodata* sections (constants, strings, etc.) */
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. = ALIGN(4);
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_etext = .;
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_sidata = _etext;
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} >ROM
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.data : AT (_etext)
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{
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. = ALIGN(4);
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_sdata = .;
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. = ALIGN(4);
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*(.data) /* .data sections */
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*(.data*) /* .data* sections */
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*(.sdata) /* .sdata sections */
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*(.sdata*) /* .sdata* sections */
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. = ALIGN(4);
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_edata = .;
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} >RAM
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/* Uninitialized data section */
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.bss :
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{
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. = ALIGN(4);
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_sbss = .;
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*(.bss)
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*(.bss*)
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*(.sbss)
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*(.sbss*)
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*(COMMON)
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. = ALIGN(4);
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_ebss = .;
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} >RAM
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}
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