From 1ab2b8068b5f6c77c201cc81c33acfacdb94f92b Mon Sep 17 00:00:00 2001
From: Michael Cardell Widerkrantz <mc@tillitis.se>
Date: Tue, 11 Feb 2025 09:24:08 +0100
Subject: [PATCH] testfw: Use special linker script for test firmware

Since we test the FW_RAM we can't keep anything there, not the stack
(already fixed by different start.S), nor the .bss, which we fix now
with a different linker script that uses app-RAM for .bss.
---
 hw/application_fpga/Makefile             |  3 +-
 hw/application_fpga/fw/testfw/testfw.lds | 69 ++++++++++++++++++++++++
 2 files changed, 71 insertions(+), 1 deletion(-)
 create mode 100644 hw/application_fpga/fw/testfw/testfw.lds

diff --git a/hw/application_fpga/Makefile b/hw/application_fpga/Makefile
index 4704a31..1322ecb 100644
--- a/hw/application_fpga/Makefile
+++ b/hw/application_fpga/Makefile
@@ -177,6 +177,7 @@ secret:
 # Included in the bitstream.
 #-------------------------------------------------------------------
 LDFLAGS = -T $(P)/fw/tk1/firmware.lds
+TESTFWLDFLAGS = -T $(P)/fw/testfw/testfw.lds
 
 $(FIRMWARE_OBJS): $(FIRMWARE_DEPS)
 $(TESTFW_OBJS): $(FIRMWARE_DEPS)
@@ -220,7 +221,7 @@ splint:
 		$(FIRMWARE_SOURCES)
 
 testfw.elf: $(TESTFW_OBJS) $(P)/fw/tk1/firmware.lds
-	$(CC) $(CFLAGS) $(TESTFW_OBJS) $(LDFLAGS) -o $@
+	$(CC) $(CFLAGS) $(TESTFW_OBJS) $(TESTFWLDFLAGS) -o $@
 
 # Generate a fake BRAM file that will be filled in later after place-n-route
 bram_fw.hex:
diff --git a/hw/application_fpga/fw/testfw/testfw.lds b/hw/application_fpga/fw/testfw/testfw.lds
new file mode 100644
index 0000000..ed328a6
--- /dev/null
+++ b/hw/application_fpga/fw/testfw/testfw.lds
@@ -0,0 +1,69 @@
+/*
+ * Copyright (C) 2022, 2023 - Tillitis AB
+ * SPDX-License-Identifier: GPL-2.0-only
+*/
+
+OUTPUT_ARCH( "riscv" )
+ENTRY(_start)
+
+MEMORY
+{
+	ROM (rx)    : ORIGIN = 0x00000000, LENGTH = 0x20000 /* Pretend we have 128 kiB */
+	RAM (rwx)   : ORIGIN = 0x40000000, LENGTH = 0x20000 /* 128 KB */
+}
+
+SECTIONS
+{
+	.text.init :
+	{
+		*(.text.init)
+	} >ROM
+
+	.htif :
+	{
+		. = ALIGN(0x00000000);
+		*(.htif)
+	} >ROM
+
+	.text :
+	{
+		. = ALIGN(4);
+		*(.text)           /* .text sections (code) */
+		*(.text*)          /* .text* sections (code) */
+		*(.rodata)         /* .rodata sections (constants, strings, etc.) */
+		*(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+		*(.srodata)        /* .rodata sections (constants, strings, etc.) */
+		*(.srodata*)       /* .rodata* sections (constants, strings, etc.) */
+		. = ALIGN(4);
+		_etext = .;
+		_sidata = _etext;
+	} >ROM
+
+	.data : AT (_etext)
+	{
+		. = ALIGN(4);
+		_sdata = .;
+		. = ALIGN(4);
+		*(.data)           /* .data sections */
+		*(.data*)          /* .data* sections */
+		*(.sdata)           /* .sdata sections */
+		*(.sdata*)          /* .sdata* sections */
+		. = ALIGN(4);
+		_edata = .;
+	} >RAM
+
+	/* Uninitialized data section */
+	.bss :
+	{
+		. = ALIGN(4);
+		_sbss = .;
+		*(.bss)
+		*(.bss*)
+		*(.sbss)
+		*(.sbss*)
+		*(COMMON)
+
+		. = ALIGN(4);
+		_ebss = .;
+	} >RAM
+}